Over the past few months, PhotonCap has covered the supply side of the optical layer that links datacenters to one another (scale-across) three separate times. This week’s SemiAnalysis breakdown of Meta’s infrastructure is the first concrete blueprint showing that demand for that layer is being deployed at gigawatt scale.[1] The point is simple. There is not one optical fight inside an AI datacenter but two: inside the rack (scale-up) is a CPO fight, and between datacenters (scale-across) is a coherent DCI fight. Meta linking campuses up to 2,000 km apart signals that independent demand is opening for the latter, the coherent layer. It sits in exactly the distance band Marvell spells out for its own COLORZ 800 pluggable, 2,000 km at 600G and 3,000 km at 400G.[2] Tickers: $MRVL $COHR $CIEN $LITE, and on the demand side, $META.

Contents

1. Intro: why optics-investment talk stays inside the rack

2. Why the space between datacenters pushes toward coherent

3. Coherent and DWDM: more light down a single fiber

4. The supply map we drew three times

5. The scale-across coherent DCI layer: who stands here

6. But is this a bet on Meta alone

7. Scenarios and what to watch

1. Intro: why optics-investment talk stays inside the rack

A single coherent pluggable can carry 400G traffic across a 3,000 km DCI span, plugged directly into a switch or router port rather than a standalone transponder shelf. That is the reach Marvell spells out for its own COLORZ 800.[2] Why would anyone suddenly need a thing like this? The answer is in the Meta infrastructure breakdown SemiAnalysis published today.[1] When people think AI optics, they mostly look inside the rack: the NVLink that binds GPUs together, CPO (Co-Packaged Optics), and who supplies the light source (CW laser). But the money flow that surfaced today was not inside the rack. It was in the space between datacenters.

Per the Meta analysis SemiAnalysis published on July 10, Meta is building five 1GW-class “titan” clusters at once, and to use them as single training resources it has to stitch campus to campus with fiber.[1] SemiAnalysis describes this campus-to-campus segment (its L4 layer) as a mix of LR optics and DWDM-plus-ZR-optics systems, chosen by fiber distance.[1] (These figures and the naming are SemiAnalysis’s own model estimates, not values Meta has confirmed.)

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That is where the optical market splits into two layers. One is the scale-up fight, turning copper into light inside the rack. The other is the scale-across fight, connecting datacenters set tens to thousands of kilometers apart. The first points toward CPO; the second points toward coherent DCI (Data Center Interconnect). The market has mostly watched the first, but Meta’s blueprint shows independent optical capex opening outside the rack too, specifically at the campus-to-campus scale-across layer. Not every scale-across link is coherent, of course. Short campus spans still use LR optics, and around 10 to 20 km, IMDD and coherent-lite overlap. But the moment the campus-to-campus structure opens from tens of kilometers out to 2,000 km, the investable point moves off CPO and onto DWDM and ZR/ZR+ coherent DCI.

2. Why the space between datacenters pushes toward coherent

Distance sets the answer. Split the three layers by distance and it looks like this. Scale-up is inside the rack, meters to tens of meters; copper (NVLink, AEC) holds here, and short-reach optics like CPO step in at the limit. Scale-out is inside the building, hundreds of meters; that is the PAM4 optical transceiver zone. Scale-across is building to building, campus to campus, kilometers to thousands of kilometers. Once that distance runs past tens of kilometers into regional and long-haul, direct detect alone (IMDD, switching light intensity on and off) can no longer meet the economics and the performance, and DWDM line systems together with coherent ZR/ZR+, which also carries phase, move to the center. The coherent DSP that undoes the resulting distortion is the heart of this layer.

The physical reason is latency. Light travels slower in fiber than in vacuum, about 208,000 km per second. SemiAnalysis notes that the one-way latency to a site 100 km away is already roughly 500 microseconds on the speed-of-light limit alone,[1] a floor physics sets no matter how good the gear is. A simulation the Corning team presented at OFC 2026 points the same way: in data-parallel training, the optimal distance between two clusters is roughly 10 to 100 km, and beyond that, communication starts to crowd out computation.[3]

So the training method itself splits. Synchronous pretraining stays inside one region, while workloads that can be coupled loosely, like RL (reinforcement learning, where a model learns to solve tasks from reward signals rather than by copying labeled answers), get spread across the globe under an asynchronous strategy.[1] This is where the investable point turns. It means the traffic between campuses is defined by bandwidth and distance, not ultra-low latency. Since you cannot hit ultra-low latency anyway, you send latency-tolerant workloads and instead push as many bits as far as possible per fiber. Coherent DCI is exactly the gear that solves that problem.

3. Coherent and DWDM: more light down a single fiber

At the link level, the reason coherent moves to the center over longer distances is simple. IMDD (direct detect), used at short range, tells 0 from 1 by light intensity alone. It is simple, so it is cheap and low power, but as distance grows, fiber dispersion (different wavelengths arriving at different times) and loss smear the signal. Coherent carries phase along with intensity, and a powerful coherent DSP at the receiver mathematically reverses that distortion. It costs more, but the payoff is holding a far longer span than plain IMDD and pushing per-fiber capacity much higher. That said, spans of hundreds to thousands of kilometers usually run on top of a DWDM line system with optical amplification (EDFA or ILA, in-line amplifier) and ROADMs in place. A coherent module does not mean “thousands of kilometers with no amplification”; it means maximizing bits per fiber on top of that line system.

DWDM (dense wavelength division multiplexing) rides along with it, carrying dozens of wavelengths down one fiber at once. Since laying new fiber between campuses is so expensive, wringing the most bits out of a strand already in the ground is the core of the economics, and coherent plus DWDM is the direct way to raise bandwidth per fiber. This used to live in the large transponder boxes of carrier backbones, but the function has moved into small pluggable form factors like QSFP-DD and OSFP. That is the backdrop for IP-over-DWDM, plugging a coherent module straight into a router. As datacenter traffic grew to carrier scale, that function moved into datacenter gear.

Figure 1: Scale-up / scale-out / scale-across layer map by distance, with Meta’s campus-to-campus (L4) structure overlaid

This much is the physics and the structure. An optical layer links datacenters, and in a hyperscaler’s actual blueprint that layer is growing to gigawatt scale. And this is not something that surfaced only today.

PhotonCap has already covered the supply side of this layer three times.

4. The supply map we drew three times

First, in our piece mapping NVIDIA’s March optical investments across the scale-up / scale-out / scale-across layers (NVIDIA optics piece), we defined the scale-across band as “2 km to 3,000 km, coherent ZR/ZR+ required” and placed Marvell’s COLORZ ZR/ZR+ line there.

Second, in our piece on Marvell’s acquisition of the Swiss plasmonics startup Polariton (Marvell Polariton piece), we flagged that Marvell IR named the acquisition target, in so many words, as scale-across, DCI, ZR/ZR+ coherent, and 3.2T and beyond. Polariton POH is the device-level IP for long-reach coherent modulation inside the Marvell stack.

Third, in our Marvell earnings piece (Marvell earnings piece), we set a monitoring point: COLORZ 1.6T ZR/ZR+ DCI module sampling in the second half of 2026, built on a 2nm coherent DSP, and whether Marvell takes the early lead in the scale-across market.

The question all three answered was who makes the parts and chips for this layer. Today’s SemiAnalysis piece on Meta fills the other side: who actually deploys it at gigawatt scale. Supply and demand met at the same coordinates.

Which leaves one question. Who takes the revenue in this 2,000 km segment as pluggable coherent replaces standalone transport, and who is vertically integrated from laser to module? And is this a bet on Meta alone, or is it structural? That is where the piece turns.

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Dr. Ashkan Seyedi, who led co-packaged optics interconnect products at NVIDIA, has left NVIDIA to run the optical interconnect business line at ams OSRAM [1].

The place he chose is not a company that builds faster lasers. It is the lighting conglomerate that, after the February 2024 cancellation of a cornerstone project widely reported to be Apple, booked a non-cash impairment of EUR 600 to 900 million and stepped back from microLED displays [1][2]. This hire is not a one-off event. It is the clearest single frame of a wave over the past quarter in which listed names attached themselves to microLED-based optical interconnect through different routes. Three weeks ago I wrote that this seat was “effectively just Avicena,” and that sentence is now wrong. This piece maps the whole wave, then separates out the two-front fight in which Marvell and Credo hedge across microLED and silicon photonics, and the volume-manufacturing wildcard that is OSRAM. Related tickers: $MRVL, $CRDO, $KOPN, $FABC, ams OSRAM (SIX: AMS).

Contents

1. Intro: The Person Who Knows Lasers Best Walked Toward microLED

2. Why microLED Got Crowded in a Single Quarter

3. What Is Public and What Is Still Open

4. The Full microLED Datacom Map: Six Routes

5. The Real Fight: Marvell vs Credo, and the OSRAM Variable

6. Different Seats Inside the Same microLED

7. Valuation: How Do You Buy a Field With No Pure Play

8. Scenarios and Monitoring

9. PhotonCap’s View

10. References and Sources

1. Intro: The Person Who Knows Lasers Best Walked Toward microLED

There is a person who built the optical products that connect GPUs at NVIDIA. M. Ashkan Seyedi, who since 2021 led co-packaged optics and pluggable interconnect products [1]. From the center of demand, he watched the productization of laser-based optical communication more closely than almost anyone.

He left NVIDIA. And the place he staked his career on was neither an InP EML laser house nor the CW laser camp. It was a lighting company, ams OSRAM, that in February 2024 was told by a cornerstone customer widely reported to be Apple that the project was cancelled, booked a non-cash impairment of EUR 600 to 900 million, and then stepped away from microLED displays [1][2]. The seat he took runs a business line chasing short-reach scale-up with GaN microLED and VCSEL.

The person who understands lasers best walked toward a light that is not a laser. (To be precise, ams OSRAM holds both microLED and VCSEL, and a VCSEL is a laser. But what makes this hire a signal is the non-laser source, the microLED.)

Let me first lay out why this carries weight. The market reads a move like this as an expensive signal. More honestly than any single paper or demo number, where talent flows across material systems tells you where the roadmap is heading. When someone who was drawing co-packaged optics roadmaps at the center of demand moves toward microLED, it means that seat has become a serious candidate [1].

Here I need to correct one sentence from my last piece. Three weeks ago I described the microLED light-source camp as “effectively just Avicena, no listed pure play” (Data Center Light Source Map). That sentence is wrong as of today. More precisely, it was already wrong at the time I wrote it. Seyedi’s hire only exposed the gap. He was not alone.

Takeaway: microLED optical interconnect is not the story of a single startup. In one quarter, several listed names attached themselves to the field. Seyedi’s move is the face of that field, not the whole of it.

2. Why microLED Got Crowded in a Single Quarter

To understand the crowding, look at the seat itself. As GPU-to-GPU bandwidth in AI data centers climbs from 800G to 1.6T and 3.2T, the connection is moving from electrical to optical. But that “light” is not one thing. Scale-out has to travel far on few fibers, so the InP laser holds; scale-up runs short distances where power and latency matter more, so VCSEL and microLED open up. In my last piece I split this along two axes, “fast and narrow” and “slow and wide.”

The reason microLED holds a weapon in slow-and-wide comes down to one line of physics. Unlike a laser, an LED has no threshold current. It can switch on and off even at very small currents, and it can send the slow on-chip signal (a few Gb/s) straight out across hundreds of parallel lanes without high-speed serialization. That removes a large share of the power burned by high-speed serialization and compensation circuitry, which opens room for energy per bit to flip at short reach. Of course driver, TIA, packaging, and redundancy overhead remain. The point is not that a laser cannot do this. It is that in this narrow seat, threshold-free light has the edge.

The problem is that as soon as this seat opened, companies that know how to make threshold-free light walked in all at once through different back doors. A company that did display microLED, a company that did automotive-lighting microLED, and a company that sold connectivity silicon all began chasing the same seat.

ams OSRAM is the most dramatic of these. OSRAM is not a company doing microLED for the first time. The opposite is true. It was one of the West’s leading microLED makers, having built a large 8-inch microLED epiwafer fab in Kulim, Malaysia, to supply a cornerstone customer widely reported to be for the Apple Watch [2]. That customer cancelled the project in February 2024 (the company never officially confirmed the customer’s name; Apple comes from industry reporting and analysis), and OSRAM booked a non-cash impairment of EUR 600 to 900 million, retreated from microLED displays, and narrowed its microLED work to an automotive forward-lighting (EVIYOS) base [2]. What is happening now is not “starting microLED.” It is that part of the microLED manufacturing experience and assets OSRAM accumulated is being reinterpreted toward data center interconnect. In its Q1 2026 results, OSRAM disclosed a development agreement with a leading AI data center infrastructure partner to commercialize a “slow and wide” micro-emitter-array optical interconnect, and it has not yet named that partner [3].

One precise point. Display microLED and a datacom emitter are different devices, even on the same GaN. A display pixel is static, while a datacom emitter switches on and off at a few Gb/s. The manufacturing base carries over, but the high-speed datacom device design skill is an area that has to be filled fresh, which is why seating Seyedi, who understands co-packaged optics, reads as the natural move [1].

Takeaway: The seat opened because of physics (the low power of threshold-free light), and it got crowded because several companies already held the manufacturing base to build that physics.

3. What Is Public and What Is Still Open

This is as far as public sources take us. Where Seyedi went, what OSRAM wrote down and what it is reinterpreting [1][2], that Marvell co-develops microLED interconnect as Mojo Vision’s largest investor [4], that Credo acquired Hyperlume to build a microLED light-source cable [6], and that Kopin and Fabric.AI are chasing GPU-to-GPU links with programmable microLED [8]. The names and the deals are all on the record.

What is not public is three things. First, who is OSRAM’s unnamed AI partner. The market names NVIDIA first because of Seyedi’s connections, but that agreement was signed before he joined, and the company has not disclosed the name [3]. Even across trade media, the names floated do not converge on one, and none of them, NVIDIA included, is company-confirmed. Second, which of these six routes actually takes the socket. Even inside the same microLED, reach and form factor split, so this is not a field where everyone wins or everyone loses. Third, given all that, where do you stand if you want to hold this wave through listed equity. A large cap that only carries exposure and a name that gains beta as the field grows are not the same thing.

The answers to these three questions, the full map of the six players, the reach sub-map, the structure of the Marvell versus Credo proxy fight, and the valuation by listed route, are worked out below. One thing I will say up front. The real contest here is not “six microLED companies.” It is a two-front fight in which two connectivity challengers hedge across microLED and silicon photonics. Who those two companies are and why they collide over the same seat is the center of this piece.

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The market read Meta’s move into cloud as a signal of compute oversupply. This piece reads it the other way. As GW grows, the thing that runs short is not the GPU. It is the InP (indium phosphide) laser light source that connects those GPUs. Running compute GW through PhotonCap’s own stress-test model, the contracted compute a single hyperscaler booked in half a year creates InP wafer demand in the same order of magnitude as one full year of revenue capacity at a top-two InP substrate maker. The goal here is to explain that bottleneck with physics rather than tickers, and to walk through the lever of the 6-inch transition, the way CPO raises InP consumption instead of cutting it, and the test bottleneck the market will price in last. Tickers: $AXTI, $COHR, $LITE, $AEHR.

Table of Contents

1. The market is reading the same compute in opposite ways

2. Why InP specifically: the material story of the light source

3. A taxonomy of light sources: why even SiPh needs InP

4. Translating compute into optics (a stress test)

5. The real wall is per-lane speed: 200G-per-lane and 1.6T

6. From scale-out to scale-up: CPO raises InP consumption

7. The physics of wafer scaling: why 3-inch to 6-inch is the lever

8. The next bottleneck is test: quieter than CPO, more structural

9. Paths where this thesis is wrong

10. Technical implications: who holds the moat

1. The market is reading the same compute in opposite ways

On July 1, when Bloomberg reported that Meta might enter the cloud business (per Reuters) [1], compute-lease names like CoreWeave and Nebius sold off immediately [1]. The overcapacity narrative, “AI compute is heading into oversupply,” came back to life. SemiAnalysis pushed back directly in its July 3 report [2]. Meta’s data center and compute procurement is accelerating, not slowing, and 2027 capex will be “shockingly high.” In the first half alone Meta contracted more than 5GW across Cloud and Colo, and two core campuses account for 2.5GW of capacity under construction [2]. (A “tent-style data center” here means Meta’s ultra-fast buildout style: instead of waiting for a finished building, power, cooling, and compute get pushed into temporary structures to maximize deployment speed.)

I agree with the SemiAnalysis read. A company standing up the cloud capability to resell compute externally is closer to a signal that it expects its own demand curve to keep bending upward. Selling “excess compute” is not evidence of surplus. It is a call option on expanding further in this direction. My read is that Meta widened into cloud because it expects to grow larger here. This pattern is not the first. I covered the case of SpaceX starting to lease compute, where the demand was written directly into the contract (SpaceX Started Renting Out Compute), and Meta is closer to the second signal following it.

If that view is right, the recent market reaction was a misread. Overcapacity fear pressed on memory-linked names and parts of the AI-infrastructure trade, but if real demand is accelerating, that correction was a mispricing and an opportunity, in my judgment (the investment call is yours). And when data centers grow, the benefit does not stop at memory. Hardware broadly benefits, and the optical interconnect that physically links that hardware benefits structurally. The catch is that this optical interconnect layer is the most supply-constrained of all.

Memory and optics are really two faces of the same wall. As I covered in The More Anthropic Buys Micron HBM, the Faster Optical Memory Pooling Arrives, the way HBM solved the memory wall was proximity, putting memory right next to the GPU, and that proximity becomes a capacity ceiling. The moment you try to detach and pool capacity, distance becomes a wall again, and crossing that distance without bandwidth or latency loss is exactly what optics does. So the stronger the electrical HBM contracts get, the greater the pressure to detach capacity cheaply (memory disaggregation), and two of the three paths for that are optical. Accelerating compute creates bottlenecks in memory and optics at the same time.

The same house’s analyst Konrad Wang framed InP as “one of several supply bottlenecks collectively gating the AI data center buildout” (Reuters) [3]. The bottleneck that links compute is not the GPU. It is the laser light source that makes the light. And that laser is mostly built on InP, a compound semiconductor that neither silicon nor GaAs can fully replace. The more tents Meta pitches, the faster InP runs dry. Start with why InP specifically.

Figure 1: Compute GW to InP wafer translation chain
Figure 1. GW to GPU to optical transceiver to InP laser/CW die to InP wafer. Each stage multiplies the one before it, and the chain condenses into a compound-semiconductor bottleneck. (Quantitative model in Section 4.)

2. Why InP specifically: the material story of the light source

The semiconductor that makes light and the one that does computation want different band structures from the start. Silicon is an indirect-bandgap material. When an electron drops from the conduction band to the valence band, the momentum does not line up, so the energy leaves as lattice vibration (heat) rather than a photon. That makes silicon an excellent transistor and a poor light emitter. At the research level there is active work to put quantum-dot lasers or III-V bonded and heterogeneously integrated light sources on silicon, but commercial datacom silicon photonics (SiPh) still depends on an external III-V source for the light itself.

InP is the opposite. It is a direct-bandgap material, so electron-hole recombination comes straight out as a photon. On top of that, the InGaAsP and InGaAs active layers lattice-matched to InP operate exactly in the key optical-communication bands (1310nm O-band, 1550nm C-band). Those two wavelengths matter because the loss and dispersion of silica fiber are optimal there. It is a material where the communication wavelengths and the band structure happen to line up. Add high electron mobility and you get ultra-high-speed modulation.

So InP is effectively impossible to replace commercially in the near to mid term. GaAs-based VCSELs pull 850 to 940nm cheaply, but the wavelength is off, so they cannot be the default for medium and long-reach datacom scale-out, and even SiPh depends on an InP CW source for its light. That is why industry contacts and SemiAnalysis alike describe it as “a material with no commercial drop-in substitute” [2]. On top of that, switching an InP substrate supplier typically requires 12 to 24 months of engineering validation and qualification, so even if an alternative source exists, you cannot swap it in overnight. It is a double bottleneck: the necessity of the material itself, layered with the rigidity of the supply chain.

3. A taxonomy of light sources: why even SiPh needs InP

The light sources you build on InP are not one kind either. The device structure splits based on how the transceiver puts light on the wire.

The EML (electro-absorption modulated laser) integrates a CW-emitting DFB laser and an electro-absorption modulator (EAM) on a single InP chip. Having the source and modulator in one body helps with speed and miniaturization, but that makes the epitaxy and process demanding. So the number of makers volume-producing 200G-per-lane class EMLs is small (Lumentum, the Coherent family, Mitsubishi, and a few others). Add the InGaAs photodiode (PD), which is also usually built on InP-family epitaxy. EML, CW laser, and PD all sit on the InP substrate and epi ecosystem, so the bottleneck condenses into this one upstream spot.

The CW (continuous-wave) laser is a source that supplies pure light with no modulation. And this CW laser is both the Achilles heel and the lifeline of silicon photonics. SiPh does modulation, routing, and even multiplexing in silicon waveguides, but in commercial datacom it cannot make the light. So a SiPh transceiver has to attach an external InP CW laser as its source to work. Against the common belief that “SiPh replaces InP,” the more commercial SiPh spreads, the more InP CW laser demand rises with it. Silicon does not push InP out. It lives on top of InP.

The economics of these two explain why SiPh keeps getting used more. As I noted in The AI Light Source War Is Not a Winner-Take-All, an EML-based 800G module uses eight 100G EMLs, so laser cost alone lands roughly in the $80 to $100 range per module, while moving the CW laser outside and handing modulation to a SiPh chip cuts the sources to two to four and brings that down to the $20 to $40 range (industry estimate). This structural cost gap is what keeps pulling SiPh adoption up, and at the same time it supports InP CW source demand from below. The choice to lower cost pushes the bottleneck into deeper upstream.

To sum up: VCSEL (GaAs) is short links, EML (InP) is a source-and-modulator combo, and CW (InP) plus SiPh is the architecture where silicon does the modulation and InP supplies the light. Whichever path you take, the light-source seat for medium and long-reach data center optics stays with InP. This device diversity actually reinforces the InP upstream bottleneck.

Figure 2: Why the light source has to be InP
Figure 2. Silicon routes and modulates light but cannot make it, and the GaAs VCSEL stays short-reach. Medium and long-reach datacom converges on an InP source.

This is where the free portion ends

So far I have used physics to pin down why InP is the material root of the optical bottleneck. From here, subscriber-only:

• PhotonCap’s own stress-test model translating GW into InP wafers (Meta 5GW = one substrate maker’s annual capacity)

• The real wall of 200G-per-lane, why CPO raises InP instead of cutting it, and the physics of the 6-inch transition

• The next bottleneck the market has under-priced: test (ATE), the one I hold most strongly

• Falsification scenarios and a tracking map

Related PhotonCap reading

• AXT (AXTI) Deep Dive: InP, the Hidden Bottleneck of AI Optical Interconnect, the substrate layer of this piece

• Everyone Saw a Laser Shortage. The Money Went to the Foundry First, SiPh foundry, InP, and SOI capacity

• The AI Light Source War Is Not a Winner-Take-All, narrow and fast vs wide and slow

• Compute Is the New Oil: So Who Builds the Drilling Rigs, the supplier-agnostic test and equipment layer

• The Three Pillars of SiPh Wafer Test: AEHR, FORM, KEYS, the test bottleneck in Section 8

• SpaceX Started Renting Out Compute: Demand Written Into the Contract, the macro precedent in Section 1

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The copper in NVL72 did not kill optical demand. The market was looking inside the rack. The money is outside it. When NVIDIA wired its 72 GPUs together over an NVLink copper spine, a bear case followed: maybe optical content shrinks. That is the read SemiAnalysis called the “optical boogeyman.” But it treats scale-up and scale-out as the same network, and that is only half the picture. The moment Reflection AI signed a compute deal with SpaceX on June 22, 2026, for $150M a month and up to roughly $6.3B through 2029 [1][2][3], this stopped being GPU-rental news and became scale-out optics and field-validation news. SpaceX, which went public on June 12 ($SPCX), is shifting Colossus into a business that rents capacity to outside AI labs [4][5][6], and Anthropic (about $45B) and Google (about $30B) are already tenants on the same infrastructure [4]. Tickers in focus: $SPCX, $NVDA.

Reflection agreed to pay $150 million a month to rent compute

Start with the deal.

Reflection AI will pay SpaceX $150M every month from July 1, 2026, for access to GB300 chips. Run to the end of 2029, that is about $6.3B [1][2]. After the first three months, either side can terminate on 90 days notice [1][2]. Reflection is an open-weight model startup founded by former DeepMind researchers, Nvidia put in $800M, and its recent valuation is $25B [1].

This is not even the first deal. Tenants are lining up for the same Colossus.

• Anthropic: deal value about $45B, through mid-2029 [4].

• Google: deal value about $30B, through mid-2029 [4]

• Cursor: being acquired by SpaceX (an acquisition, not a lease) [3][4]

• Reflection: $150M a month, through end of 2029 [1][2]

Colossus, originally built to train Grok, has turned into a business that rents chips to outside AI labs [4]. The compute appetite of the open-weight camp is also adding demand to this rental model [5]. And on June 12, SpaceX went public and within days became one of the most valuable listed companies by market cap [6]. That said, $SPCX spiked right after listing and has since pulled back amid a roughly $20B bond offering and valuation concerns [6].

What matters here is not who the tenants are. It is that GPU utilization has started carrying a monthly price tag. Once rent is attached, the physical infrastructure underneath is no longer “capex that might get used someday” but “gear that has to hit a utilization target.” Compute is moving from an asset you buy to an asset you rent.

Compute is no longer gear you buy once. It has become an asset metered as monthly rent.

The Numbers on the Contract Split Into Copper and Light

For anyone who has not read the prior piece, in one line: in an AI buildout, the layer everyone passes through in a supplier-neutral way is optical modules, wafer/test, and deployment validation. This deal signals that demand at that layer is no longer just a vague capex inference. (Background is in Compute Is the New Oil. So Who Builds the Drilling Rigs?.)

The difference looks small but matters for investors. When a buildout sits on “demand will show up someday,” that is speculative capex. But when contracts with named amounts and end dates sit on top, like Anthropic, Google, and Reflection, the hardware demand underneath gains visibility [4]. With a 90-day termination clause, you cannot say it is “locked in” [1]. What changes is the question, from “will demand come” to “how much utilization is already contracted.”

So one layer down, what physical demand does that rent roll become? Hundreds of thousands of GPUs is a number on paper, but the moment it draws a path inside the rack, it splits into copper and light.

Figure 1. Colossus tenants by compute deal size and term.

Where the market misread it is the NVL72 copper spine

The problem is treating scale-up and scale-out as the same network.

A GB300 NVL72 rack holds 72 Blackwell Ultra GPUs and 36 Grace CPUs [7][8]. Power runs roughly from the 120kW range to the mid 150s kW depending on configuration and workload, and by Lenovo’s document it is 135kW TDP and up to 155kW peak [8][9]. This rack uses two kinds of network.

First, scale-up. Inside the rack, 72 GPUs are bound into one NVLink domain (1.8TB/s bidirectional) [7]. This is copper. Nvidia made it copper on purpose. Running the same links over optical transceivers would add about 20kW just for transceivers and retimers, so Nvidia wired the NVLink spine directly in copper to spend that power on compute instead [10]. That copper scale-up choice is what drove the “NVL72 kills optics” read, the one SemiAnalysis named the “optical boogeyman” and rebutted [10]. (Note that the recent optical-stock selloff is more about profit-taking on rich multiples than about this read. They are different things.)

Second, scale-out. The compute (East/West) fabric that links rack to rack. This is different. By NVIDIA’s reference architecture, an NVL72 rack (18 trays) puts a ConnectX-8 board on each tray to build the East/West fabric, and the per-tray aggregate bandwidth of that fabric is 3200 Gb/s [7]. Across the full rack, that is 72 scale-out connections at 800G class, matching the 72 GPUs. At the order-of-magnitude level, the key is one 800G-class scale-out connection per GPU [7][8][9]. And this East/West interconnect makes broad use of pluggable optical transceivers and detachable fiber [7]. Wiring the inside of the rack with copper does not reduce the optical ports leaving the rack.

So reading NVL72 as “less optical” is only half the picture. Scale-up did go copper, but optical intensity (scale-out ports per GPU) does not drop [10]. And as a cluster grows, spine sits above leaf and super-spine above that [7], so optical port demand actually rises with GPU count.

The copper in NVL72 is a scale-up story, not a scale-out story. The bigger the cluster, the more scale-out optical demand scales with GPU count.

Converting GPU count into optical ports and field-validation events

Now drop Colossus 2 scale into the physical layer. First, the uncertainty in the scale numbers. Colossus 2 bought its site last March and came online this January. Planned capacity has been reported at 2GW, roughly 555,000 GPUs, and about $18B, but these are not company-confirmed figures (trade press reporting, not confirmed by the company). In fact, against Musk’s claim of 1GW, January satellite imagery showed cooling for only about 350MW, and May reporting had 19 gas turbines being deployed [6]. So there is a large gap between plan and observation. The conversion below applies GB300 NVL72 reference-design ratios as an order-of-magnitude illustration, and Colossus 2’s actual GPU generation mix and topology have not been confirmed by the company (author estimate).

The ratio is simple. At the scale-out leaf level, it is one 800G port per GPU [7][8]. At a scale of hundreds of thousands of GPUs, that is hundreds of thousands of 800G ports at the leaf level alone (author estimate). Each optical link carries a transceiver at both ends, and once spine tiers sit above leaf, total transceiver count becomes several times the GPU count [7] (author estimate). Strip out the short runs handled by DAC/AEC and the real optical transceiver count comes in below that, but the order-of-magnitude feel is “hundreds of thousands of GPUs equals hundreds of thousands of scale-out ports, and once upper network tiers are included, a much larger number of optical transceiver endpoints.”

What the contract becomes at the physical layer:
1 GPU → 1 scale-out 800G-class connection
1 NVL72 rack → 72 GPUs → 72 scale-out connections
Hundreds of thousands of GPUs → hundreds of thousands of scale-out ports (at leaf)
Every optical endpoint → insertion-loss / return-loss / OTDR / BER validation

And each optical connection creates at least one field-validation event. (This is a different layer from semiconductor ATE test insertion. Package-level test insertions grow separately, and what we mean here is fiber field validation.) Field guides show GB300 deployments bringing in pre-terminated 144-fiber trunks and validating every connector with insertion-loss, return-loss, and OTDR [11]. More important, even transceivers that pass commissioning see BER drift as temperature rises, so a module that was fine at 25C starts accumulating errors under sustained load at 35C [11]. This is not plug-once-and-done. It creates validation demand at install time and recurring in operation. Optical module and structured-cable lead times run to months, so they can sit on the critical path of a deployment schedule [11].

The logic from the prior piece meshes here. I argued that denser packaging makes package-level test insertions grow superlinearly because of known-good-die economics, and scale-out optics points the same way. More GPUs means more optical ports, and more optical ports means more field validation and BER monitoring.

Figure 2. The two networks of GB300 NVL72: copper scale-up vs optical scale-out.

Figure 3. Translating GPU count into scale-out ports and field-validation events, an order-of-magnitude ladder.

How offtake contracts change equipment-layer beta

It is cleanest to split the demand into three layers. (This is a map of where demand lands, not a stock recommendation. The author holds no position in the names mentioned.)

• Optical modules/transceivers: the direct beneficiary of scale-out ports moving from 800G to 1.6T. Representative names include Coherent ($COHR) and Lumentum ($LITE).

• Silicon photonics/packaging: the layer that benefits when value shifts from modules to on-package via CPO/LPO.

• Optical/network test: field validation, BER, and production test. Representative names include Viavi ($VIAV) and Keysight ($KEYS).

One more structural point. A module vendor’s beta tracks closer to the port count, while a test vendor’s beta tracks closer to port count times operational complexity. So as the network moves from 800G to 1.6T, the leverage on validation difficulty can grow faster than raw unit counts. The test layer can be a more convex layer, not just trailing demand.

The key is that the character of demand changes. Before, you inferred “optical demand should follow” from hyperscaler capex guidance. Now the contract values are stated, like Anthropic about $45B, Google about $30B, and Reflection about $6.3B [4]. When a tenant runs that compute, GPUs run, and for GPUs to run, scale-out optics has to be in place, and that optics goes through validation.

Of course the 90-day termination clause is the biggest crack [1][2]. The full contract value is not guaranteed revenue. But one thing is clear. The GPU infrastructure already installed stays in place even if a tenant leaves, and taking the next tenant needs the same scale-out optics and validation. Optical and test demand is tied to the infrastructure itself, not to any single tenant.

The optical module market is not small either. 400/800G datacom optics is estimated to grow from about $9B in 2024 to about $16B in 2026, and AI-cluster optics is estimated to already exceed $4B a year [12]. Weigh one Colossus 2 buildout against that market and you can see how much a single offtake contract carries.

Tenants can change, but the scale-out optics and field validation needed to take the next tenant stay fixed to the infrastructure. The beta shifts from tenant risk to infrastructure utilization risk.

Scenarios and Monitoring

Base Case. Colossus 2 buildout proceeds as planned and tenant utilization holds. Scale-out optics and validation demand land in proportion to GPU count, and the equipment layer’s revenue visibility firms up one notch, from capex inference to contract-based.

Alternative. If CPO (co-packaged optics) and LPO (linear pluggable optics) arrive faster than expected, the value of scale-out optics shifts partly from discrete module vendors toward switch/NIC silicon and silicon photonics [12]. Transceiver counts fall, but packaging and validation difficulty rises, so the center of gravity of the beta moves from modules to photonics packaging and test.

Downside. If the 90-day termination clause actually gets pulled [1], or if the Colossus 2 buildout slips on power and site constraints, contract-based visibility retreats back to inference. The gap between the 1GW claim and the roughly 350MW observation, plus filling power with gas turbines, puts a question mark over whether this buildout gets filled as planned [6]. In that case the offtake premium fades, and optical demand goes back to moving with the hyperscaler capex cycle.

Monitoring points. (1) Whether Colossus 2 discloses actual operating capacity and GPU generation mix [6], (2) additional tenant signings and termination disclosures, (3) the pace of the 800G to 1.6T transition, (4) timing of CPO/LPO adoption [12], (5) optical module lead times (currently on the order of months [11]), (6) how $SPCX share price and the bond offering affect the pace of capex execution [6].

PhotonCap’s View

Do not read this deal as an acquisition. What SpaceX is acquiring is Cursor, and Reflection is a tenant renting compute [4]. The distinction matters because an acquisition is a one-time event, while a lease is a recurring utilization signal.

I read this deal not as a stock call but as a change in the character of demand. The equipment and validation layer that everyone passes through in a supplier-neutral way now sits on a lease with a stated contract value, not on capex inference [4]. The simplest version is this. The moment compute becomes a rental asset, the scale-out optics and field validation that physically enable that rental asset stay with the infrastructure even as tenants change.

That said, the 90-day termination clause and the 1GW versus 350MW observation gap always put an asterisk on this picture [6]. The discipline of this piece is to not read contract values and planned capacity as guaranteed numbers.

GPU tenants can change. But the optical ports, the fiber plant, and the validation workflow laid down to take those tenants do not disappear. That is why this deal reads as optical supply-chain news, not GPU news.

References & Sources

[1] TechCrunch, “SpaceX inks compute deal with Reflection AI, an open source AI lab”, Jun 2026.

[2] Reuters, “AI startup Reflection signs computing power deal with SpaceX”, Jun 2026.

[3] The Wall Street Journal, “SpaceX Strikes $6 Billion Deal With AI Startup for Data-Center Space”, Jun 2026.

[4] CNBC, “SpaceX signs computing power deal with open-source AI startup Reflection worth up to $6.3 billion”, Jun 2026.

[5] Axios, “Open-source AI gets more compute from SpaceX”, Jun 2026.

[6] Data Center Dynamics, “SpaceX secures $6.3bn compute capacity deal from AI startup Reflection”, Jun 2026.

[7] NVIDIA, “Network Logical Architecture, NVL72 AI Factory Enterprise Reference Architecture”, 2026.

[8] Lenovo Press, “Lenovo NVIDIA GB300 NVL72 Rack Scale AI Product Guide”, 2026.

[9] Introl, “NVIDIA GB300 NVL72 Deployment Guide: Blackwell Ultra Specs and Engineering”, 2025.

[10] SemiAnalysis, “Nvidia’s Optical Boogeyman: NVL72, Infiniband Scale Out, 800G and 1.6T Ramp”, Mar 2024.

[11] Akash Borate, “Understanding how to bring up NVIDIA GB300 NVL72: From Facility to First Run”, May 2026.

[12] FPX Research, “Beyond Power: The Networking Bottleneck Starting to Take Shape”, Dec 2025.

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Disclaimer: This article is an independent, engineering-driven technical analysis published by PhotonCap. All content is based on publicly available information and is intended for educational and informational purposes only. Nothing herein constitutes a recommendation to buy, sell, or hold any security. The author may hold positions in securities discussed and may transact at any time without notice. Readers should conduct their own due diligence before making any investment decisions.

On June 22, 2026, Micron ($MU) announced a strategic agreement with Anthropic bundling a memory supply contract, joint design work, and a strategic investment into Anthropic’s Series H round [1]. Around the announcement, the stock traded at record-high levels [2]. Yet read the full agreement and the words optical, photonic, and interconnect never appear once. HBM, DRAM, SSD. All electrical memory. This piece uses that deal as a doorway to one idea. The memory wall is, at bottom, the problem of feeding data to compute fast enough, and HBM solved it by sitting the memory right next to the GPU. That very adjacency is what blocks the path to more capacity. The moment you pull memory away to add capacity, distance throws you back into the same wall. Carrying bandwidth and latency across that distance is what optics does. There are three paths to memory disaggregation, two of them optical and one electrical. The title is strong on purpose, but the claim in the body is narrower: this deal does not pull optical revenue forward so much as it strengthens the case for why optics becomes necessary. That is the author’s inference, and the body states its limits.

Intro: A Memory Deal With No Optics in It

On June 22, 2026, Micron announced its strategic agreement with Anthropic. Joint memory and storage architecture design, a multi-year supply contract, a strategic investment into Anthropic’s Series H round, and Micron’s internal adoption of Claude, all in one structure [1]. Around the announcement, $MU traded near record highs [2].

Read the agreement from top to bottom and there is no optical, no photonic, no interconnect. HBM, DRAM, SSD. A pure electrical memory deal. You might ask why PhotonCap, which covers optics, would write about this at all.

One thing first. The memory wall is not Anthropic’s problem alone. Any company scaling models, OpenAI or Google or anyone else, stands in front of the same wall. This deal is simply the most recent scene showing how much money that wall now trades for. So this piece uses the Anthropic deal only as a doorway and walks straight into the wall itself.

What the Memory Wall Actually Means

Think of the memory wall as a kitchen. The GPU is a kitchen that takes ingredients (data) and cooks (computes). The trouble is that cooking speed rises every generation, while the speed of bringing ingredients to the stove cannot keep up. However fast the kitchen, if the ingredients arrive late, it sits idle and waits. That waiting is the memory wall. The core issue is not capacity but speed, meaning bandwidth (how much at once) and latency (how quickly it arrives) [3].

HBM’s answer is simple. Put the pantry right next to the stove. Close means fast, and you can move a lot at once. HBM4 is the generation that enlarged this adjacent pantry, doubling the interface width under the JEDEC standard (JESD270-4) to push past 2 TB/s per stack [4]. NVIDIA Rubin secures roughly 22 TB/s with eight such stacks [5].

The catch is that the space next to the stove is small. The edge of the GPU die (the beachfront) has a fixed perimeter, so you cannot attach HBM without limit. Two things follow. First, to add memory you have to add GPUs. Memory and compute get locked into a fixed ratio. Second, there is a ceiling on how much memory a single GPU can reach.

This is where people often misread it. “Can’t you just add capacity? You can always buy more memory.” True. DRAM itself you can always buy more of. But the moment that memory sits far from the GPU rather than beside it, distance drops the bandwidth and stretches the latency. (For how distance and frequency break down an electrical signal, I covered it in detail in DSP, LPO, NPO, CPO: The Four Optical Architectures.) You hit the memory wall again. So the capacity problem is not a wall separate from the memory wall, it is an extension of the same one. The price HBM paid to clear the wall through adjacency is exactly the ceiling on capacity.

The short version: the memory wall is a problem of access speed [3], and HBM solves it by pinning memory right against the GPU. That adjacency creates the fixed ratio and the capacity ceiling, and the moment you try to pull memory away, distance becomes the wall again. To break this loop you have to carry speed across distance. That is where optics enters.

Why It Matters Now: Supply Is Short and Prices Are Rising

That this wall is not abstract is something the memory market is proving right now.

As it happens, Micron reports FQ3 FY2026 results after market close on June 24, 2026. The company’s prior guidance was revenue of $33.5B (plus or minus $750M), gross margin of about 81%, and non-GAAP EPS of $19.15 (plus or minus $0.40) [6]. Consensus just before publication varies by data source (revenue roughly $34B to $35.6B, EPS roughly $19.7 to $20.8), so it is hard to pin to a single number [7]. So rather than the number itself, look at the structure the number points to. If guidance holds, a gross margin near 81% would be the highest in the company’s 47-year history. This is a basis for the bull case and, at the same time, a symptom of the wall. HBM volume for 2026 is already sold out across every supplier [5], and price is the core driver of revenue growth. Prices rise because supply is short. Micron itself has said that as process transitions yield less, more greenfield wafer capacity is needed [8]. That is an admission that adding capacity keeps getting more expensive and slower.

Why this shortage is structural comes down to one ratio. Micron has stated on its earnings calls that, in the same process node, HBM consumes about three times the wafer per bit compared with ordinary DDR5, and that the ratio grows further with HBM4 [9]. Every HBM stack you add takes that much commodity DRAM supply out of the market. That is why the HBM boom drags commodity DRAM prices up with it.

The demand side sends the same signal. In early June, a one-line news item rattled memory stocks for days. The report was that NVIDIA would cut the low-power memory module (SOCAMM2) of its next-generation Vera Rubin server from 192GB to 96GB per module. The Elec and SemiAnalysis pinned the reason on an LPDDR supply shortage [10]. (This sequence is laid out well in Why NVIDIA Halved the Middle Memory. Keep in mind none of it was officially confirmed by the companies. It is reporting.) The market traded this headline twice. First it sold, reading the cut as “AI memory demand has finally cracked,” and a few days later it bought back, reading it as “no, they are rationing because there is not enough to go around.”

Nutty

Why NVIDIA Halved the Middle Memory

In early June, a single line of news rattled memory stocks for days…

Read more

24 days ago · 27 likes · 5 comments · Nutty

Both scenes point to one thing. Memory is short, and the root of the shortage is a structure where usable memory is expensive and that expensive memory has to sit next to compute. If a path opens to add capacity cheaply, decoupled from compute, this pressure eases. That path is memory disaggregation, and that is where optics shows up.

Three Paths Around the Wall: Memory Disaggregation

There is more than one way to pull memory off compute while keeping it usable. (For a map of the optical interconnect layers overall, seen through OFC 2026 papers, see I Read 24 Papers.) It splits into three paths, two of them optical and one electrical.

Path 1. Optical I/O chiplet (optical, the foundation). This is the path of building the optical input and output itself that holds bandwidth and latency when memory travels over distance. Ayar Labs is the representative. It drops an optical I/O chiplet called TeraPHY into the GPU or accelerator package, converting the electrical signal to light at the package edge and sending it out. It runs at roughly 8 Tbps bidirectional with latency around 10 to 25 nanoseconds, and because it extends the UCIe standard into optics, it is not locked to any single chip [11][12]. This is not a memory product but the foundation layer that lets memory sit far away. Ayar, with NVIDIA and AMD as investors, raised a $500M round in March 2026 and remains an independent company [11]. (For why CPO entered scale-out before scale-up, I covered it in Taiwan GTC Computex 2026: CPO.)

Path 2. Optical memory fabric, O-HBM (optical, a complement to HBM). This specializes optical I/O for memory, bringing HBM not beside the GPU but optically to any point on top of the die. Celestial AI’s Photonic Fabric is the representative. (For the technology itself and the denominator behind the “25x” claim, I laid it out in NVIDIA’s $2B Marvell Bet and Celestial AI’s “25x” Claim.) The core is letting the processor address, on top of the die-edge electrical HBM, optically connected HBM (O-HBM) as well [13]. One important positioning point.

This does not replace electrical HBM, it adds on beside it as a complement. You can free up the die edge to attach more electrical HBM there, or hang additional HBM optically. (For the structure of freeing the die edge to load more HBM, I covered it in detail in Copper Wall, Age of Light.) It pushes the capacity ceiling itself upward.

Path 3. CXL DRAM pooling (an electrical bypass, a candidate for later optical extension). Instead of buying more expensive HBM and GPUs to add capacity, this binds cheap commodity DRAM (DDR5) into a shared pool that multiple accelerators draw from. It is a slower tier than HBM, so it cannot stand in for HBM, but it substitutes for the cost of “buying more compute just to get capacity.” Strictly speaking, though, this path is not optics itself. XConn, which Marvell acquired, currently ships PCIe and CXL switching silicon (PCIe 5 / CXL 2.0 in production, PCIe 6 / CXL 3.1 sampling), and its role is near-range memory disaggregation [14]. Once the pooling radius reaches beyond the rack, the distance and power limits of electrical CXL can be complemented by optical I/O. So it is electrical for now, with optics as the next extension candidate.

In one line: Path 1 lays the road, Path 2 grows HBM along that road, and Path 3 routes around having to buy more HBM at all. (For how to cut the memory cost itself, How the Memory Tax Gets Solved takes a different angle on it well.)

Damnang’s Substack

How the Memory Tax Gets Solved

Memory got expensive and supply is short…

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22 days ago · 60 likes · 5 comments · Damnang

Figure 1: The three paths to memory disaggregation. Path 1 optical I/O chiplet (optical, foundation) / Path 2 O-HBM (optical, HBM complement) / Path 3 CXL DRAM pooling (electrical bypass, optical as later extension). Show each path’s role, representative company, distance/latency zone, and whether it is optical

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Who, and When: Supply Chain and Investment Points

The three paths differ by company and by timing. This is where it splits from an investment view.

Independent vs consolidated. Path 1’s Ayar stays an independent company with NVIDIA and AMD as investors, tied into Taiwanese ASIC partners like Alchip and GUC and into TSMC packaging [11]. Paths 2 and 3, by contrast, Marvell gathered under one roof. It announced Celestial in December 2025 and closed it on February 2, 2026 ($3.25B base, up to $5.5B with milestones) [15][16], and it completed the XConn acquisition on February 10, 2026 [14]. (For the quarter where these two acquisitions first showed up in the numbers, I covered it in The Third Signal in May: Marvell Confirms.) So the optical memory fabric and CXL pooling consolidated into $MRVL, while the optical I/O chiplet layer remains in the independent camp (Ayar and others).

The layer underneath. Optical Paths 1 and 2 both need a light source (laser) to make the light and a foundry to print the PIC. Path 3’s CXL pooling is electrical for now, but as the pooling radius grows, an extension layer that meets optical I/O appears. Ayar’s SuperNova light source uses Sivers’ DFB laser, and TeraPHY runs on GlobalFoundries and TSMC processes [12]. This light-source, foundry, and packaging layer is the common ground that gets laid no matter which way the optical paths go. (For NVIDIA’s bets on this light-source and optical layer, see Coherent, Lumentum, Marvell, and Now Corning.)

Timing. This matters most. Marvell has guided that meaningful revenue from Celestial begins in the second half of FY2028, reaching a $500M annualized run rate in Q4 FY2028 and $1B in Q4 FY2029 [16]. XConn is earlier, with revenue beginning in Q3 FY2027, a $50M annualized run rate in Q4 FY2027, and $100M in FY2028 [14]. Both paths have a gap before revenue ramps in earnest, and optical O-HBM runs a step behind electrical CXL. Ayar likewise puts the real maturing of the optical I/O market at 2026 to 2028 [11].

Figure-Table 1: Supply-chain positioning of the three memory-disaggregation paths. Path / Optical? / Role / Representative / Ticker or Status / Revenue Timeline

Net of it, the path to unlocking capacity is not waiting on invention. A company stands on each path, Paths 2 and 3 gathered into $MRVL, and Path 1 left in the independent camp. The remaining variables are adoption speed and the different revenue timelines per path. Electrical CXL first, optics next.

How This Deal Moves the Clock (Author’s Inference)

From here on this is not what a primary source states directly but the author’s inference. Let me be clear about that going in.

The Micron-Anthropic deal locks in electrical HBM on a multi-year basis [1]. In the short run this is not favorable to optical disaggregation. If anything, it fixes electrical HBM demand in place. So the frame that “optics rode along on this deal” is wrong.

But from the capacity angle, the direction flips. A commitment to scale frontier models on a multi-year basis means hitting the constraint that memory must sit next to compute more often and harder. No matter how high you push HBM bandwidth, as long as capacity cannot be separated from compute, a workload that needs more capacity has to buy more GPUs alongside, and that pushes total memory prices higher through the structure where HBM eats about three times the wafer of DDR5 [9]. The stronger the electrical HBM lock-in, the greater the pressure to separate and add capacity cheaply, meaning the case for memory disaggregation grows.

The limits of this inference are clear. First, this is not a conclusion Micron or Anthropic stated, but the author’s inference drawn from the structure of the memory wall. Second, a stronger case does not automatically speed up adoption. There are separate gates of yield, latency validation, and customer qualification. Third, timing is the crux. The pressure builds now, but optical revenue is FY2028 and beyond, so this is a lag play, not a catalyst. The “clock” in the title is the hook, and the more precise word is “the case.”

Scenarios

Labels are qualitative only. No probability percentages.

Base Case. Electrical HBM stays the center of data center memory through 2026 and 2027. Multi-year deals like Micron-Anthropic keep coming, adjacent memory bandwidth keeps strengthening [4], and the sold-out posture holds [5]. Memory disaggregation begins showing up in revenue with electrical CXL (XConn) from FY2027 and optics (Celestial) from FY2028 [14][16], building share gradually as a lag play.

Alternative. Capacity pressure surfaces faster than expected. Of the three, CXL pooling (Path 3) gets adopted before optical O-HBM, at near range, serving as the first bypass [14]. In this case the optical I/O chiplet (Path 1) and O-HBM (Path 2) follow as the next step.

Downside. Capacity gets routed around without disaggregation. Per-stack capacity gains in HBM4E (48GB 12-high and the like) and model-side memory efficiency (quantization, offloading) delay the pain enough that the case for optics weakens and the revenue timeline slips further out [17].

What to Monitor

• The June 24 Micron earnings call: 2027 HBM visibility, ASP and price durability, margin hold, greenfield capacity comments, and the actual beat against a consensus that varies by source [6][7][8]. The stronger the shortage and pricing power, the more the capacity pressure shows up in the numbers.

• The quarter where Celestial and XConn figures get broken out in Marvell’s results. Whether the FY2027 (XConn) and FY2028 (Celestial) guides pull forward or slip is the speedometer [14][16].

• Customer qualification, tape-out, and volume announcements from the independent optical I/O camp like Ayar. Whether Path 1 moves first [11].

• Official adoption of memory pooling and disaggregation by hyperscalers. Whether the electrical CXL path (Path 3) or the optical path (Paths 1, 2) comes first.

• HBM4E capacity density, the DRAM price curve, and module configuration shifts like SOCAMM [10][17].

PhotonCap’s View

This deal has no optics in it. That is a fact, and the right move is to accept it as is. The frame that optics rode directly onto a memory deal is overclaim.

Here is the picture I see instead. The memory wall is a problem of access speed, and HBM solved it through adjacency while creating a capacity ceiling. Pushing that ceiling across distance is memory disaggregation, and it has three paths: optical I/O chiplet (optical), O-HBM (optical) [13], and CXL pooling (electrical, with optics as a later extension). Paths 2 and 3 are already gathered into $MRVL [15], and Path 1 remains in the independent camp. The order is electrical CXL first into revenue, optics following. This deal does not pull that clock forward directly, but it hardens the case for pulling memory off compute. My positions ($POET, $LWLG) do not map cleanly onto this memory-pooling set, so I have left them out of this article’s analysis.

Coming Next

This piece goes as far as the “necessity” of disaggregation. Why it is needed, who stands where. The next paid piece will go a step deeper into when optical memory actually becomes revenue, through which yield and validation gates, and the realistic roadmap per path. Necessity and feasibility are different convictions.

References & Sources

[1] Micron Technology, “Micron and Anthropic Announce Strategic Agreement to Scale Next-Generation AI Infrastructure”, 2026.6.22. Joint memory/storage design, multi-year supply contract, Series H investment, internal Claude adoption.

[2] TheStreet, “Bank of America strongly resets Micron stock price target”, 2026.6. $MU trading at record-high levels around the Anthropic deal, 800%+ one-year return.

[3] Introl, “The AI Memory Supercycle”, 2026.1. Memory wall definition. Bandwidth and latency of feeding data to compute as the bottleneck.

[4] Siemens, “HBM3e and HBM4: IC design guide for next-generation high bandwidth memory”, 2026.4. JEDEC JESD270-4 (2025.4), 2048-bit, 32 channels, over 2 TB/s per stack, up to 64GB/stack.

[5] Introl, “South Korea’s HBM4 Moment”, 2026.1. Rubin 288GB HBM4 across 8 stacks, about 22 TB/s. SK Hynix, Micron 2026 HBM volume sold-out guidance.

[6] Micron Technology, “FQ2 2026 Results and FQ3 Guidance” (SEC Form 8-K, Ex-99.1), 2026.3. FQ3 guide revenue $33.5B (plus or minus $750M), gross margin about 81%, non-GAAP EPS $19.15 (plus or minus $0.40).

[7] indmoney, “Micron Earnings Preview: HBM, AI Memory Demand & MU Stock Outlook”, 2026.6. June 24 report, consensus varies by source, revenue roughly $34B to $35.6B, EPS roughly $19.7 to $20.8. (Consensus estimate, varies by source.)

[8] Micron Technology (investor conference comments), “Micron IR Earnings Summary & Outlook (J.P. Morgan TMT Conference)”, 2026.5. Demand exceeding supply, tightness persisting beyond 2026, price as the core driver of revenue growth, lower process-transition productivity requiring greenfield wafer capacity.

[9] Tom’s Hardware (citing Micron management), “HBM is coming for your PC’s RAM”, 2025.12. Per Micron’s earnings remarks, HBM consumes about three times the wafer of DDR5 per bit at the same node, with the ratio widening for HBM4. (Micron CEO Mehrotra, FQ2/Q3 FY2024 call.)

[10] The Elec, “Nvidia Cuts SOCAMM2 Capacity in Half Amid LPDDR Shortage”, 2026.6.9. SOCAMM2 module cut from 192GB to 96GB, attributed to LPDDR shortage (originating from SemiAnalysis reporting, June 4). Not officially confirmed by the companies.

[11] DatacenterDynamics, “Optical interconnect startup Ayar Labs closes $500m funding round backed by Nvidia and AMD”, 2026.5. NVIDIA/AMD-backed $500M round (2026.3), TeraPHY optical I/O, Alchip/TSMC partners, independent.

[12] Gazettabyte, “Ayar Labs prepares to fulfil its optical input-output (I/O) vision”, 2026.2. TeraPHY 8 Tbps bidirectional, UCIe extended into optics, SuperNova using Sivers DFB laser, GlobalFoundries/TSMC processes.

[13] Optics.org, “Celestial AI lands $100M for optical interconnects”, 2023. OMIB, O-HBM, optical delivery to any point on the die. (Includes Celestial’s own claims.)

[14] Marvell Technology, “Marvell Completes Acquisition of XConn Technologies”, 2026.2.10. PCIe and CXL switching silicon. PCIe 5/CXL 2.0 production, PCIe 6/CXL 3.1 sampling. Revenue beginning Q3 FY2027, $50M annualized run rate Q4 FY2027, $100M FY2028.

[15] Marvell Technology, “Marvell Completes Acquisition of Celestial AI” (SEC Form 8-K/A, Ex-99.1), 2026.2.2. Acquisition closed.

[16] Marvell Technology, “Marvell to Acquire Celestial AI, Accelerating Scale-up Connectivity”, 2025.12.2. $3.25B base up to $5.5B, pooled memory appliances noted, revenue beginning 2H FY2028, $500M Q4 FY2028, $1B Q4 FY2029.

[17] TechTimes (reporting), “SK hynix Ships 12-Layer HBM4E Samples Ahead of Schedule”, 2026.6.19. 48GB 12-high HBM4E samples.

Disclaimer: This article is an independent, engineering-driven technical analysis published by PhotonCap. All content is based on publicly available information and is intended for educational and informational purposes only. Nothing herein constitutes a recommendation to buy, sell, or hold any security. The author may hold positions in securities discussed and may transact at any time without notice. Readers should conduct their own due diligence before making any investment decisions.

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When AI data centers move from copper to light, the market looks at laser companies first. Lumentum, Coherent, the EML and CW laser shortage. That is the most intuitive story. But in this cycle, the money moved first not into lasers but into the SiPh foundry layer. Tower has locked in $1.3B of silicon photonics contracts on a 2027 revenue basis, and in the same quarter it took in $290M of customer prepayments, which Tower states are for capacity reservation.[1] Corporate gross margin rose from 20.4% in Q1 2025 to 26.8% in Q1 2026.[2] When capacity is scarce, customers pay up front for capacity that has not been built yet. The investment question is narrower: which layer can turn scarcity into margin. Foundry capacity, SOI wafers, InP materials, and CPO packaging are all tight, but they do not capture value the same way. The market watches the laser suppliers; this piece follows the capacity that fabricates, packages, and tests the optical engine. $TSM $GFS $UMC $TSEM $SLOIF $XFAB.

Tower Has Already Shipped 5 Million Coherent PICs

On June 18, 2026, Tower Semiconductor (TSEM), together with Marvell, announced it had shipped over five million coherent PICs cumulatively. A coherent PIC has to control not just the amplitude of light but its phase and polarization, which is a higher process bar than a direct-detect part. It is the most recent evidence that AI data center interconnect (DCI) is moving to light.[3]

The number itself is not the point. It matters because Tower is already producing at this scale, and that overlaps with another number from the same company.

A semiconductor foundry usually does not take money from customers up front. It builds the fab, installs the tools, ramps yield, then sells wafers to recover the cost. So a foundry’s biggest fear is an empty fab. Yet Tower booked $290M of silicon photonics customer prepayments into its Q1 2026 cash flow, and stated these were for capacity reservation. Its silicon photonics contracts stand at $1.3B on a 2027 revenue basis, the 2028 wafer commitment is larger still, and further prepayments arrive through January 2027.[2][1] Corporate gross margin rose from 20.4% in Q1 2025 to 26.8% in Q1 2026 ($111M gross profit divided by $414M revenue).[2]

The combination is unusual. Tower has a production shipment record in coherent PICs, while customers are prepaying to reserve capacity that is not built yet. In Tower’s own wording, actual demand and shipment forecasts run higher than the contracted $1.3B.[1]

That is the inversion in this cycle. Investors framed the optical transition through lasers (LITE, COHR, the EML and CW shortage), but the first hard pricing signal appeared at the foundry layer.

Figure 1. Tower’s corporate gross margin expanded while SiPh customers prepaid for capacity reservation. Source: Tower Semiconductor Q1 2026 results and the $1.3B silicon photonics contract announcement.

This Is a Capacity Problem, Not a Technology Problem

As AI clusters grow, copper interconnect loses on power, reach, and equalization cost. So from 800G to 1.6T and then 3.2T, the optical share of the link can only rise. The market already prices some version of that transition.

The hard part is not deciding to use light. It is manufacturing the PICs that handle it. A SiPh PIC cannot be fabricated at a generic CMOS fab. The waveguide (the path the light travels), the modulator (electrons to light), the photodetector (light to electrons), Ge/Si integration, optical test, and packaging all have to line up together. Mainstream SiPh for high-performance AI datacom runs on 200mm and 300mm CMOS-compatible foundry processes, and the larger foundries are pushing toward 300mm. Production-scale supply is concentrated in a small group of qualified foundries.

So the AI optical cycle turns from a game of who designs it into a game of who holds the production capacity.

I covered who is technically ready in this field in our Samsung silicon photonics piece. This piece takes a different angle. Who holds the capacity, and how it shows up in price and margin.

This bottleneck does not end at the foundry layer. To fabricate a SiPh PIC you need photonics-grade SOI wafers underneath, and one company supplies the overwhelming share of those wafers. I looked at it in our Soitec piece. To make the lasers you need InP (indium phosphide) substrates, and as flagged in our AXT deep dive, NVIDIA locking up capacity has stretched lead times out past 2027.

Both upstream bottlenecks have already shown up in the share prices. As of June 20, 2026, Soitec (Euronext Paris: SOI, US OTC: SLOIF) was up roughly +54% from our April 15 coverage and AXT (AXTI) roughly +96% from our March 3 coverage (price basis). The moves cannot be attributed to a single catalyst, but they show the market has started to price upstream materials scarcity. AXTI in particular has been volatile on recent InP-related news.

Figure 2. SLOIF and AXTI re-rated after PhotonCap coverage. Source: Euronext Paris and Nasdaq pricing, indexed to 100 at each coverage date. As of June 20, 2026.

SOI wafers, InP substrates, foundry fabs, and packaging. Nearly every layer of the stack is tight at the same time.

Everyone Is Adding Capacity, But Demand Is Faster

By company, the field breaks down like this.

Tower is expanding its global multi-fab SiPho capacity substantially. The company calls it a substantial capacity ramp, and it is the foundation of its 2028 $2.8B revenue model.[1] The 2027 $1.3B of contracted revenue and the prepayments above are the demand base under it.

GlobalFoundries acquired AMF, the Singapore-based SiPh foundry, in November 2025, becoming the largest pure-play SiPh foundry by revenue.[4] AMF adds over $75M in 2026 revenue, and GFS pulled its target for crossing $1B in SiPh revenue forward from 2030 to 2028.[5][6]

TSMC moves with COUPE, but its role is a bit different. It fabricates the chip while also being the packaging backbone (CoWoS, SoIC).[7][8]

UMC entered in December 2025 by licensing imec’s iSiPP300, targeting risk production in 2026 to 2027[9], and it is taking TFLN (HyperLight/Wavetek) at the same time.

Samsung has also entered, but it has no public production track record or design win yet.

Meanwhile, LightCounting calls 2026 “the year of silicon photonics,” expecting more than half of all optical transceiver revenue in 2026 to come from SiPh modulator-based products. That was 10% in 2018 and 33% in 2024.[10] The demand curve is steeper than the capacity build.

Figure 3. The silicon photonics supply stack is constrained at every layer. SOI wafer to InP substrate to foundry to TFLN/SiN to packaging and test. The materials and foundry layers are the current chokepoints.

The free takeaway is straightforward. SiPh capacity is short.

The investment question is where that shortage converts into margin. Tower and GFS both point to prepayments, but the quality of those signals may differ. Soitec may be the cleaner upstream bottleneck. And if CPO accelerates, value capture may move toward TSMC and OSAT packaging instead. Below, we split the supply chain into foundry, SOI, InP, TFLN, SiN, and packaging and test, and look at which layer is most defensive.

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In the same month, CME and ICE both announced compute futures tied to GPU rental rate indices, and compute began turning into a cash-settled exchange commodity.[1][2] Put SpaceX’s Cursor acquisition, the Oracle-OpenAI $300B/4.5GW deal, and Microsoft-OpenAI’s end of exclusivity in one frame, and the unit the market prices is shifting from chip ASP to contracted compute.[3][4][5] The thesis here is simple. Contracting GW eventually translates into wafer starts one layer down, and no matter who wins at the chip and compute layer, the supplier-agnostic layer everyone passes through is deposition, etch, bonding, probe, burn-in, ATE, and metrology. If compute is oil, part of the money is made not at the oilfield but in the rigs that drill it and the tools that inspect it.

($NVDA $ORCL $MSFT $CME / $FORM $AEHR $KEYS $TER $ATEYY $AIXA $VECO $ALRIB $OXIG $IQE $AXTI)

Intro: The Exchanges List Compute

The same exchanges that trade crude, corn, and bitcoin are now moving to list compute. In May, CME partnered with Silicon Data to announce compute futures based on a GPU on-demand rental rate index, set to launch later this year and pending regulatory review.[1] The contracts are cash-settled rather than physically delivered, and days later ICE brought its own GPU futures based on Ornn’s Compute Price Index, so the two largest exchanges moved the same way in the same week.[2] CME called compute the new oil of the 21st century.[1]

The phrasing may sound large, but when an exchange attaches a forward curve to an asset, that is the market admitting the asset has become a commodity big and volatile enough to need hedging. And this admission did not come from nowhere. The unit had been shifting for the better part of a year.

Last September, Oracle signed a five-year, $300B, 4.5GW deal with OpenAI, where the unit was not a count of chips but gigawatts.[4] A month later, Microsoft gave up its right of first refusal as OpenAI’s compute provider while still securing an incremental $250B Azure commitment.[5] And this June, days after its IPO, SpaceX acquired Anysphere, the parent of the AI coding tool Cursor, in a $60B all-stock deal.[3] It did not buy a chip company. It bought an application that consumes compute and turns it into revenue. The three share one thing. The price tag is no longer written in chip ASP. It is written in contracted compute.

The market still reads this change as a story about GPUs, cloud, and power infrastructure. But the moment compute lists on a futures market, the real question shifts from “who sells the GPU” to “who holds the bottleneck in compute production.” From that angle, a layer of equipment and test sits below NVIDIA, below cloud, and further inside than power. This article looks for the beta in that lower layer.

That lower layer is the deeper sublayer of what I covered as Layer 3, Ground AI Compute, in The Largest IPO in History, One Profitable Layer. In that piece I flagged this layer as the one with the weakest SpaceX uniqueness among the four, because the upside in GPU, power, cooling, and optical interconnect belongs not to SpaceX alone but to all of AI capex. The constraint the S-1 named for ground AI was also power, cooling, and land. This article goes one step below that, to the manufacturing and test equipment layer that turns compute into actual chips and optical engines. Whether the final winner is SpaceX, OpenAI, or Oracle, or NVIDIA or a custom ASIC, the winner’s identity is not the key variable for this layer. The point is that as long as compute capacity grows, everyone passes through this physical production layer. That industry-wide upside has to land somewhere. This article starts there.

Takeaway: An exchange attaching futures to GPU rental rates and big tech contracting compute by the gigawatt are two faces of the same event. The unit the market prices is moving from the chip to compute capacity.

Buying GW Means Buying Wafers

Move down one layer. Compute capacity is not an abstract number but a physical quantity. A gigawatt is roughly the deployed silicon area times power density. Some of the demand compresses through performance (node scaling), but what scaling cannot compress, volume has to carry. One accelerator is area on a wafer, and laying down more accelerators raises wafer starts.

So Oracle’s 4.5GW deal, viewed one layer down, is a wafer starts deal, and Microsoft’s $250B Azure commitment and the compute SpaceX wants to fill by combining xAI and Cursor all converge on the same place.[4][5] At the chip and model layer, whether NVIDIA wins, a custom ASIC wins, or xAI wins, all of them pass through the same manufacturing capacity.

Compute financialization also speeds this up. The exchanges describe the futures market as a way to give data centers price protection.[2] Once a forward curve exists, GW buildout becomes bankable, easier financing means faster expansion, and faster expansion means more wafer starts. The fact that this buildout is currently supply-constrained by material and labor shortages, with reports of some Oracle-linked OpenAI data centers slipping toward 2028 even as Oracle says its contractual milestones remain on track,[6] is exactly what makes price protection through a forward curve meaningful. Making compute a commodity grows demand for the equipment that produces that commodity.

A familiar analogy fits here. An oil price can be hedged with futures, but the rigs and oilfield services that pull the oil are not hedged, they absorb the cycle directly. It is the same setup as the gold rush, where the person selling pickaxes made steadier money than the person digging for gold. So where is compute’s pickaxe, compute’s drilling rig?

Takeaway: Contracted compute translates one layer down into wafer starts. And compute financialization makes buildout bankable, which amplifies that translation. No matter who wins the chip war, there is a supplier-agnostic manufacturing layer everyone passes through.

This Much Anyone Can Map

Everything so far is routing you can draw from public material alone. Compute became a commodity, GW comes down to wafer starts, and below that sits a supplier-neutral manufacturing layer. Anyone who reads the headlines can reach this point.

The supplier-agnostic layer in this article is not an abstract AI infrastructure layer. It is the manufacturing, packaging, and test equipment layer that turns compute into a physical product, actual chips and optical engines. To keep it from sounding vague, here is the outline first. The path that turns compute into chips breaks into seven segments. III-V deposition and etch, epi wafers and substrates, bonding, probe and wafer-level test, burn-in, ATE, and metrology. PhotonCap has covered these segments separately over time. Deposition and epi in The 6 Companies Behind Coherent and Lumentum, bonding in Seven Bonding Companies for HBM4 and CPO, and test in The Silicon Photonics and CPO Testing Bottleneck and The Three Pillars of SiPh Wafer Test. This article rebuilds those segments, seen separately until now, under the single frame of compute financialization. The paid section below identifies which companies sit in each segment, and where the beta is most concentrated.

The real difference is what comes next. Do you take this cycle through the broadest WFE names like Applied Materials and LAM Research, or through the specialized equipment and test companies attached more tightly to the compute production bottleneck? Both ride the same cycle, but the revenue impact can differ by an order of magnitude. Where the beta concentrates, the answer may run against intuition.

Three things get worked out below. First, exactly what equipment makes up the layer everyone passes through regardless of the chip and compute winner, and which names stand on which side. Second, why dense packaging grows this layer faster than “count,” the mechanism of that super-linearity. Third, which names survive even in a scenario where compute prices fall.

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When PicoJool unveiled its 200G VCSEL and 32x50G μVCSEL on June 15, 2026, a 30-year-old technology landed back on the table as an AI data center light source candidate [1][3]. Around the same window, Avicena, back in the spotlight before and after the PicoJool news, was pushing a non-laser GaN μLED link, driving Tx energy from 200fJ/bit in September 2025 down to 80fJ/bit in November 2025 [4][8]. Data center light sources are now splitting into three material systems and structures: InP edge-emitting laser, GaAs VCSEL, and GaN μLED. But the question the market asks, “who builds the faster laser,” is not the real one. The real axis is which light source the reach, lane count, and serialization cost actually call for. This piece lays out the physics of the three, then uses two axes, “fast and narrow” and “slow and wide,” to map which source takes which seat and which companies already sit there. Related tickers: $AAOI, $LITE, $COHR, $SIVEF, $ALMU, $AVGO.

Contents

1. Intro: Why a 30-Year-Old Light Came Back

2. Why the Light Source Is the Data Center’s First Gate

3. Three Light Sources: InP Edge-Emitting Laser, GaAs VCSEL, GaN μLED

4. The Quadrant: Fast and Narrow vs Slow and Wide

5. Supply Chain Map: Who Makes Which Light

6. PicoJool’s Bet and Avicena’s Bet

7. Scenarios and Monitoring

8. References & Sources

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1. Intro: Why a 30-Year-Old Light Came Back

On June 15, 2026, a Silicon Valley startup called PicoJool unveiled its 200G VCSEL product family [1]. Bandwidth above 37GHz per channel, with quad 100G, quad 200G, and a 32x50G NRZ μVCSEL. Pat Gelsinger (former Intel CEO, now a partner at Playground Global) is on the investor list, and production runs at WIN Semiconductor, the foundry that has shipped more than a billion VCSELs for 3D sensing [1][2].

What makes this announcement matter is that VCSEL is not just a legacy part anymore. It came back as a scale-up optical I/O candidate. VCSEL has been the workhorse of short-reach data center optics since 1996 [3]. Through the AI cycle it sat on the bench under the verdict “cannot go far, speed is capped,” and now that 30-year-old light is back with an 800G, 1.6T, and 3.2T roadmap [1].

Around the same time, another light source rose from the opposite direction. Avicena’s GaN μLED. It is an LED rather than a laser, and it pushed Tx power from 200fJ/bit in September 2025 down to 80 femtojoules per bit in November [4][8]. The market asks “who builds the faster laser,” but the real answer is “which topology can absorb the serialization cost.” Scale-out has to travel far on few fibers, so the InP edge-emitting laser holds; scale-up runs short distances where power and latency matter more, so VCSEL and μLED open back up.

Takeaway: A data center light source is not one thing. InP laser, GaAs VCSEL, and GaN μLED chase different seats with different physics.

2. Why the Light Source Is the Data Center’s First Gate

Bandwidth between GPUs in an AI data center is climbing from 800G to 1.6T, 3.2T, and 6.4T, and copper cannot keep up on distance and power. So the connection is moving from electrical to optical.

The first place that bottlenecks in the move to light is the source itself. Silicon has an indirect bandgap, so it cannot generate light efficiently. You can build waveguides and modulators, and add germanium for detectors, but high-performance light sources are a different story. Research tracks like the silicon Raman laser and heterogeneous integration exist, but commercial data center light sources still depend mostly on III-V gain materials such as InP, GaAs, and GaN.

This matters for investors because the cost and supply bottleneck of an optical module concentrates at the source. A standard EML-based 800G module needs eight 100G EMLs, putting the laser cost alone in the $80 to $100 range per module (industry estimate), while putting a CW laser outside and modulating on the SiPh chip ends with only 2 to 4 sources, dropping to roughly $20 to $40 (industry estimate). That structural cost gap is what keeps lifting SiPh share. I covered this economics, and the $AAOI case that took it head on through vertical integration, in depth here: $AAOI, From $10 to $150.

3. Three Light Sources: InP Edge-Emitting Laser, GaAs VCSEL, GaN μLED

Start with one big split. Light sources divide by how they make light. A laser amplifies light through stimulated emission, so it has a narrow linewidth and strong coherence. An LED runs on spontaneous emission, so it has a broad spectrum and no coherence, an incoherent source. And a laser needs a threshold current to start lasing, while an LED has no threshold. These two things, the presence or absence of coherence and of a threshold current, are the root of how reach and power split. One thing to flag: VCSEL is also a laser. The edge-emitting laser and the VCSEL both run on stimulated emission; what differs is the structure (edge emission vs surface emission) and the material system (InP vs GaAs). Let us look at the three that actually get used in data centers, one at a time.

3-1. Edge-Emitting Laser (DFB / EML / CW)

This is an edge-emitting laser, where light leaves the side of the chip. It is the workhorse of today’s 800G and 1.6T modules. If it emits light and loads data at the same time it is an EML; if it just emits steady light and leaves modulation to the SiPh chip it is a CW laser. The way InP DFB, GaAs quantum dot, and monolithic approaches bet on different time horizons for this light source seat is laid out here: The Silicon Photonics Light Source War.

• Material: InP. Mostly the 1310 / 1550nm bands

• Emission: stimulated. Light bounces between two end mirrors and amplifies, giving a narrow linewidth and strong coherence

• Fiber: single-mode (SMF). Long reach (km class)

• Modulation: EML combines a DFB and an EAM on one InP chip. CW does no modulation; the SiPh MZM/MRM handles it

• Weak spot: a threshold current means a high power floor, and per-chip cost is high

• Seat: 800G/1.6T pluggables, CPO external light source (ELS)

3-2. VCSEL (Vertical-Cavity Surface-Emitting Laser)

As the name says, this is a surface-emitting laser with a vertical cavity. Light comes straight up out of the top of the chip. A short cavity sits between stacked DBR mirrors above and below, and an oxide-narrowed aperture shapes the output. It has been the workhorse of short-reach data center optics since 1996 [3], and it is the light PicoJool pulled back out at 200G [1].

• Material: GaAs. Mostly 850nm

• Structure: top and bottom DBR mirrors and an oxide aperture. Surface emission

• Fiber: multimode (MMF). Short reach (tens of meters)

• Strength: you can test it on-wafer and print it in arrays, so it is dramatically cheap

• Weak spot: being multimode caps the reach and speed of a single lane

• Workaround: pivoting to many slow lanes in parallel (32x50G μVCSEL, slow and wide) [1]

• Seat: short-reach scale-up, NPO

3-3. μLED (micro-LED)

From here it is not a laser anymore. It is an LED with no cavity, that is, spontaneous emission. So it is an incoherent source with light that spreads and a broad spectrum, but having no threshold current becomes a decisive weapon at short reach. It turns on and off fast even at very small currents. Avicena closing a 4Gb/s link at around 100µA drive and getting down to 80 femtojoules per bit comes straight out of this physics [8].

• Material: GaN. Built on display μLED process foundations

• Emission: spontaneous (LED). No cavity, so incoherent with a broad spectrum

• Threshold current: none. So ultra-low power. From 200fJ/bit in September 2025 down to 80fJ/bit in November [4][8]

• Speed/reach: the link runs about 4Gb/s per lane, with reach above 10m. On-chip data (around 2Gb/s class) goes straight out as light with no serialization [8]

• Receive: silicon PD array. TSMC builds the visible-light PDs on its image-sensor (CIS) process [9]

• Seat: ultra-short-reach chip-to-chip, memory interconnect [5]

3-4. Research Frontier: nanoLED and the Optical Antenna (and How It Differs from μLED)

If μLED is “many slow LEDs in parallel,” there is research going the exact opposite way. Making a single LED as fast as a laser. That is the optical antenna-LED pushed by Eli Yablonovitch and Ming Wu’s group at Berkeley. An LED is slow because spontaneous emission itself is slow, but attaching a nanometer-scale optical antenna to the emitter can raise the spontaneous emission rate by tens of times through the Purcell effect. With a strong enough antenna, spontaneous emission can even become faster than stimulated emission. The group has shown coupling an antenna-LED’s light into a single-mode waveguide at high efficiency (around 70% in an InP-waveguide demo) [6], and has gone as far as analyzing how to bundle such nanoLEDs over WDM [7]. The core is one line. Use an optical antenna to speed up spontaneous emission and lift the LED’s modulation bandwidth.

Here is the μLED vs nanoLED difference in short.

• μLED: micron scale. Borrows the display GaN ecosystem. The spontaneous emission rate is unchanged, so each lane is slow, and total bandwidth is filled by hundreds of parallel lanes. Close to commercial (Avicena).

• nanoLED: nanometer scale with an optical antenna attached. Purcell speeds up spontaneous emission to make a single LED fast. It aims at single-mode waveguide coupling without a threshold. Still at the paper and demo stage [6][7].

So μLED solves it “wide” and nanoLED solves it “fast,” two different routes to the same advantage, the threshold-free LED. Both start from the same place: dodging the laser’s threshold current.

[Figure 1: Three-panel structural cutaway. (1) Edge-emitting laser: InP, edge emission, a single-mode beam exits sideways between two cavity mirrors. (2) VCSEL: GaAs, top and bottom DBR mirrors and an oxide aperture, a vertical beam exits the top. (3) μLED: GaN, diffuse light with no cavity spreads upward. Five key bullets beside each panel. Top band contrasts “Stimulated emission / coherent” vs “Spontaneous emission / incoherent” and “Threshold current: needed / needed / none”.]

Wrap the three sources in one line: InP laser goes far, fast, and expensive. VCSEL goes near, cheap, and parallel. μLED goes nearer, with less power, and wider.

[Figure 2: Reach (x axis, log) vs energy per bit (y axis). InP laser / VCSEL / μLED plotted as points to visualize the “give up distance, power drops” tradeoff.]

Takeaway: The root of the split is physics. Whether there is coherence and whether there is a threshold current decide reach and power.

That covers the public physics and industry structure. The investment question here is not the physics explainer, it is socket allocation. Put the three sources on the “fast and narrow” and “slow and wide” axes and which quadrant takes which application, and which company already sits there? The company-level detail is in the two pieces linked above, and the full map with VCSEL and μLED added is completed below.

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Micron fell close to double digits in a single session and the whole AI memory trade wobbled with it. The spark was a note saying NVIDIA’s Rubin platform would halve its SOCAMM memory capacity, and the market read it as a sign that the memory cycle was rolling over. But the reported cut was on the CPU-side LPDDR5X, while the GPU-side HBM4 stayed untouched. The claim of this piece is simple. If the cut is real, it is less a sign of demand destruction than a sign that the local capacity tier is running into supply, power, and heat, and one of the most structural ways to relieve that wall is an optical memory fabric. Local DDR5 access is about 115 ns while an electrical CXL memory pool sits at 200 to 300 ns, and that gap is exactly where optics enters. We frame this around $MU, $NVDA, and $MRVL.

Contents

• The Day It Broke

• Which Memory Got Cut

• Why It Got Cut: Supply, Not Demand

• So Here Is the Real Question

• Splitting the Memory Hierarchy by Temperature

• Then Why Not Just Grow to 256 GB SOCAMM2

• The Electrical Ceiling of CXL Is the Doorway for Optics

• The Same Vector That Made SOCAMM Leads to Optics

• Which Workloads Move to Light

• Who Stands Where in the Supply Chain

• Scenarios and Monitoring

• What Would Make Me Drop This Thesis

• Closing

The Day It Broke

Memory names cracked in a single session. Micron ($MU) dropped close to 10 percent intraday at one point, falling hard from near the prior day’s highs. SanDisk, Western Digital, and Seagate were dragged down with it. [1]

The trigger was a SemiAnalysis note that circulated on the morning of June 4, 2026. The content was this. NVIDIA could cut the CPU-side SOCAMM DRAM in the next-generation Rubin NVL72 rack from about 55 TB to about 28 TB per rack, roughly a halving. In module terms, the estimate was that the standard 192 GB configuration would drop to 96 GB, with high capacity left only as a custom option. [1][2]

That is where the market reflex kicked in. “Memory demand is cut in half, this is bad for Micron.” The price moved on that read. But the question is not whether the fear is real. It is whether the fear points the right way.

And this pattern looked familiar. Just days earlier, in the CPO selloff, the trigger was again a single line from a SemiAnalysis note, and the market read it as “CPO is dead” and threw every optical name into one basket. Yet many of the names that got sold were not even tied to CPO. The lesson I drew there applies here too. You do not look at one form factor or one BOM line, you look at which layer underneath is actually constrained on supply. SOCAMM is a BOM line. The layer that is actually constrained sits somewhere else.

[Figure 1: What actually got trimmed. HBM is the desk and stays on package, SOCAMM is the shelf and got halved]

Which Memory Got Cut

Start with an analogy. Think of a desk and a shelf. The HBM next to the GPU is the desktop. It holds the data you are computing on right now, so it is fast but expensive and small. The SOCAMM next to the CPU is the shelf beside the desk. You do not open it constantly, but it carries the capacity. This cut left the desk alone and trimmed only the shelf. The market read it as “memory overall got cut.”

Look at Rubin NVL72 from a memory angle and it is two blocks. The GPU side carries HBM4. That was not touched. On NVIDIA’s official spec, HBM4 stays at 288 GB per GPU and about 20.7 TB per rack. This is the layer where model weights, the KV cache, and training throughput live. NVIDIA itself describes LPDDR5X and HBM4 as one coherent pool, with the HBM KV-cache offloaded to LPDDR. [3]

The side that got cut is the CPU side. On NVIDIA’s official spec, the Vera CPU carries up to 1.5 TB of LPDDR5X, which works out to about 54 TB across an NVL72 rack of 36 Vera CPUs. Reports and platform analysis read that as eight SOCAMM slots populated with 192 GB modules. The cut scenario circulating in the market is the story of taking that 192 GB down to 96 GB. [3][2]

So what broke was not the high-bandwidth memory next to the GPU, it was the system memory next to the CPU. SOCAMM, the Small Outline Compression Attached Memory Module, is an LPDDR5X module form factor that NVIDIA built together with Micron, Samsung, and SK Hynix. The key point is that it is LPDDR5X, but in a socketed module rather than soldered down. At 14 by 90 mm it is about a third the size of a traditional RDIMM, and each module stacks four LPDDR5X stacks across 16 die. [4][5]

Capacity varies by generation and die density. The first generation was introduced around 128 GB, the SOCAMM2 generation moved to 192 GB, and Micron pushed it to 256 GB using a 32 Gb monolithic 1-gamma die. Eight 256 GB modules give 2 TB per CPU. Micron positions this high-capacity SOCAMM2 directly for offloading the KV cache from HBM to LPDDR. The heart of this cut is that the high-capacity 192 GB standard configuration can be lowered to 96 GB. [6]

The numbers make the meaning of the cut clear. On a reported basis of eight SOCAMM slots per CPU, the total LPDDR5X per CPU splits by module capacity like this.

96 GB x 8 = 768 GB per CPU 192 GB x 8 = 1.5 TB per CPU 256 GB x 8 = 2 TB per CPU

Going from about 54 TB on the official spec (the 192 GB configuration) to about 28 TB in the reported scenario (the 96 GB configuration), this cut is less “use less memory” and more a decision to ration the per-rack warm capacity tier by nearly half. HBM (about 20.7 TB per rack) is left alone and only the CPU-side capacity tier is adjusted. The reason the title reads “The Cut Was Not HBM” is in these numbers. [3][2]

Why does this module structure matter? Because it explains that the cut is the reversible kind. The contact pads run up to 694 versus roughly 260 pins on a DDR5 RDIMM, and that I/O density lifts the aggregate bandwidth per module. It operates at about 1.05 V, cutting memory power by 30 to 35 percent versus a DDR5 RDIMM. The design intent is to move the same capacity at lower power. Because it is socketed, you can install 96 GB now and swap to 192 GB later. That modularity was exactly what NVIDIA stressed at CES. Compute tray assembly time dropped from two hours to five minutes. “Install first, fill later” is built into the form factor. [5]

Why It Got Cut: Supply, Not Demand

This is the spot the market missed. If the public reporting and the supply-chain estimates hold, the more direct reason for the cut is high-capacity LPDDR5X supply and cost constraints rather than weakening demand. Along the TrendForce line, the 2027 preliminary allocation plans from Samsung, SK Hynix, and Micron cover only about 60 percent of the low-power DRAM NVIDIA needs. So NVIDIA chose to lower per-module capacity while raising total module shipments. Deploy more Vera CPUs, but size the per-module capacity to the supply ceiling. [7]

And SOCAMM is a form factor that died once and came back. The first-generation SOCAMM effectively folded on the GB300 “Cordelia” platform because it could not stay inside the thermal envelope. Socketed seating is worse than soldering for the heat path, and stuffing high-density LPDDR5X modules into the tight thermal budget next to the GPU hit the wall. What came out of that is the JEDEC-standardized SOCAMM2 (JESD328), which raises speed from 8533 to 9600 MT/s and adds SPD profiles. [8]

One more point. People lump everything together as “the DRAM shortage,” but in reality three branches compete for the same wafer. The HBM that attaches to the GPU, the LPDDR5X that smartphones and AI servers share, and the commodity DDR5 for servers and PCs. HBM eats a lot of wafer area per bit, so as HBM grows it squeezes the other two branches. SOCAMM uses the middle one, LPDDR5X, and because AI servers compete with smartphones for the same pool, 2027 gets especially tight. So reading this cut as “falling DDR5 demand” confuses the branches. What got cut is the LPDDR5X side, and it got cut because it is scarce, not because it is in surplus. Memory takes a large share of server power, so this capacity tier also gets heavier on power and cost the more you grow it. [9][7]

To put it plainly. The local capacity tier is being pressed from three directions at once. Supply (LPDDR5X scarcity), power (memory as a large share of server power), and heat (Cordelia overheating). The SOCAMM cut is the first visible symptom of that pressure.

Three things the market confused in this SOCAMM cut.

One. HBM did not get cut. The HBM4 next to the GPU is untouched, and what got cut is the LPDDR5X capacity tier next to the CPU.

Two. Memory demand did not vanish. If anything, high-capacity LPDDR5X supply is short, so the move is to lower per-module capacity and raise the number of systems.

Three. It does not mean an optical memory fabric replaces SOCAMM tomorrow. The local capacity tier hit the wall of supply, power, and heat, and one of the long-run ways through that wall is pooled memory and optical reach extension.

So Here Is the Real Question

This far is the range you can follow from public material. What SOCAMM is, why it got cut, why HBM was left alone.

Go one step deeper and a different picture shows up. If the local capacity tier is blocked by supply, power, and heat at the same time, then there is a ceiling on the very approach of packing more memory into each node. Replicating the same DRAM across every node gets more expensive and hotter the more you do it.

There are several paths through that ceiling. Larger SOCAMM2 (256 GB samples already exist), better LPDDR supply, CXL local expansion, software tiering, an NVMe and SSD tier, and memory compression all move together. One of the most structural among them is pulling memory out of the node, sharing it as a pool, and reaching that pool with light. And that overlaps with the optical layer PhotonCap tracks. [6]

Here is where the questions split. Does optics replace the tier SOCAMM holds, or extend it? Why is the CXL protocol not enough over copper, and why does it need light? In the same DRAM-short environment, why might the short-term price reaction of the three memory makers and the long-term thesis for the optical fabric read in different directions? And in this transition, who is actually buying up the pieces?

The answer is in the numbers. Local DDR5 is about 115 ns, an electrical CXL pool is 200 to 300 ns. That gap is the doorway for optics. The paid section works through who sits on which layer between that 115 ns and 200 to 300 ns, why Marvell is gathering Celestial AI and XConn as bets in the same direction, and how this picture could be wrong. Below we unpack the three-tier memory hierarchy, the supply-chain positioning, the scenarios, and the falsification conditions.

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On June 9, an institutional-only SemiAnalysis note lit the fuse, and optics names dropped together. AAOI fell 14%, COHR 11%, LITE 8% [1][2]. The market’s logic was simple: “CPO volume slips to 2028 to 2029, so photonics is over.” Yet the very next day the same names bounced (AAOI +7%, LITE +5%, COHR +2%) [3], and in the same week NTT, SK, and Chunghwa Telecom launched a new $500M fund pointed at optical communications and light sources [4][5]. This piece lays out the four optical architectures, DSP, LPO, NPO, and CPO, in a way a non-specialist can absorb in one read, then maps where Lumentum, Coherent, AAOI, and Sivers actually sit on that ladder. The thesis is one sentence. Photonics is not CPO. CPO is one form factor among several, and the light source, substrate, and fiber sit inside every one of them.

Table of Contents

1. In the Same Week, Two Opposite Things Happened

2. Why “Photonics Equals CPO” Is the Wrong Equation

3. The Optical Architecture Ladder: DSP · LPO · NPO · CPO (Pluggable+DSP / LPO / NPO / CPO)

4. So Why Does This Matter for Investing

5. Form Factor by Form Factor: What Gets Removed, What Stays

6. The Copper-Light Boundary: Lane Speed Pushes the Line Inward

7. The Light Source Map: Lumentum · Coherent · AAOI · Sivers

8. Capital Votes on the Destination, Not the Quarter

9. Copper Runs Longer. That Is Not a Bear Case.

10. Scenarios and Monitoring

11. Closing: Look Far, Not at Tomorrow

The PhotonCap Series Behind This Piece

• Part 1: There Is No Such Thing as a “CPO Stock,” How the Market Misread SemiAnalysis

• NVIDIA’s $4 Billion Photonics Bet: Broadcom Wasn’t Wrong · COHR, LITE

• Coherent, Lumentum, Marvell, and Now Corning: NVIDIA’s 4 Photonics Bets · COHR, LITE, MRVL, GLW

• NVIDIA’s $2B Marvell Bet and Celestial AI’s “25x” Claim · MRVL, interconnect

• The Silicon Photonics Light Source War: Same Problem, Three Solutions · Sivers, QD Laser, Aeluma

Intro: In the Same Week, Two Opposite Things Happened

On June 9, optics stocks fell apart in a single session. AAOI led the way down 14%, with Coherent off 11%, Lumentum 8%, and Ciena 7% [1][2]. The trigger was an institutional-only note from SemiAnalysis. It reportedly said CPO (Co-Packaged Optics) volume timing is later than hoped, and outlets relayed summaries without confirming the original [1].

The story the market read was this: “CPO is late. CPO is photonics. So sell photonics.” The middle sentence is wrong, and the selling started from there.

That there is no such thing as a “CPO stock” is the argument I made in yesterday’s part 1. Today’s part 2 builds on it: draw the optical architecture once, and you can see why that middle sentence is wrong.

The same week ran the other way too. On June 10, the names that fell the day before simply bounced back. AAOI +7%, Lumentum +5%, Coherent +2% [3]. And that same day, at NTT headquarters in Tokyo, NTT, SK Telecom, Taiwan’s Chunghwa Telecom, and the Development Bank of Japan (DBJ) announced the IOWN AI Fund. Size $500M (about 760 billion won), with a management company, Catalight Capital, based in Silicon Valley and Tokyo. The stated investment scope names “Photonics Technologies,” “Light Source and Modulators,” and “optical communications” outright [4][5][6].

On one side, a “CPO is late, so sell the light” wave. On the other, telecom carriers and financial capital putting fresh money into “light.” Both in the same week. One of them is misreading the clock.

The June 9 selloff translated “CPO delay” into “sell photonics.” Whether that translation holds becomes a one-minute judgment once you know what the optical architecture actually looks like.

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Why “Photonics Equals CPO” Is the Wrong Equation

Start with an analogy. There is a power plant, and there are lamps that run on its electricity. Lamps come in types: ceiling fluorescents, desk lamps, recessed wall fixtures. CPO is the “recessed wall fixture.” It is fiddly to install, and the work can run late.

But you do not sell the power plant because the recessed fixtures are behind schedule. Fluorescents, desk lamps, and recessed fixtures all draw from the same plant. In CPO terms, the “power plant” is the light source, the substrate, and the fiber. Whatever form factor you choose, light has to be generated somewhere, modulated or routed through something, and carried somewhere.

Many of the names sold off on June 9 are closer to “power plant companies” than “fixture companies.” Lumentum and Coherent make lasers, transceivers, and materials, a layer that pluggable, LPO, and CPO all need. The plant stock fell on news that the recessed fixtures are running late.

This either-or, “CPO or copper,” is not new. Back in March, when Broadcom’s Hock Tan said on the earnings call that copper could carry the within-rack job and that CPO would arrive in time, not in 2026 or 2027, the market read it the same way, as a fight between a copper camp and an optics camp. As I laid out in NVIDIA’s $4 billion optics bet, Broadcom and NVIDIA were not in conflict but looking at different axes of time and distance. Inside the rack at 0 to 2 meters, copper is right for 2026 to 2027. Across clusters at 10 to 100 meters, optics is right for 2028 to 2030. This CPO delay panic is just the June version of that same frame.

So how do you tell “plant” from “fixture”? You learn the optical architecture ladder.

The Optical Architecture Ladder: DSP, LPO, NPO, CPO in One Pass

This ladder is best read along two axes. One is how close to the ASIC you put the optical engine. The other is where you restore the degraded electrical signal. LPO is a move along the second axis: it removes the module DSP and leans more on the host ASIC’s SerDes. NPO and CPO are moves along the first axis: they pull the optical engine toward the ASIC. The optical engine (the cluster of optics that makes and receives light) and who restores the signal, those two together are what name every form factor.

Why does that matter? Because the electrical signal coming out of the AI chip (ASIC) travels over copper wiring. The faster the signal goes (these days over 200G per lane in PAM4), the faster it degrades on copper. There are only two ways to deal with that. One is to attach a chip (DSP) that restores the degraded signal. The other is to pull the optical engine closer to the ASIC and cut the copper distance outright. The ladder is the process of shrinking the copper electrical run by reducing the DSP, pulling the optical engine toward the ASIC, or combining the two. Let us climb it.

Rung 1. Pluggable + DSP (today’s standard)

The optical engine sits inside a swappable module that plugs into the switch front panel. The 800G and 1.6T transceivers you usually hear about are this. Electrical signals from the switch ASIC travel across copper PCB to the front panel, and the longer that run, the more the signal degrades, so a DSP (Digital Signal Processor) inside the module restores it. It is the most mature and most proven approach.

• Definition: optical engine inside a pluggable front-panel module. Today’s 800G/1.6T standard.

• How it works: ASIC to copper PCB to front-panel module. The long run degrades the signal, so the module’s DSP restores it.

• Upside: standardized, hot-swappable (swap just the module on failure), long reach, the most mature ecosystem.

• Tradeoff: the DSP is power hungry, and each module has a power and thermal ceiling, so rising bandwidth hits a wall.

Rung 2. LPO (Linear Pluggable Optics)

Same pluggable form factor, but with the module’s DSP removed. The switch ASIC’s SerDes handles signal conditioning instead, and the module’s amplifier (TIA) and driver simply pass the signal through in linear mode. The DSP was the most power-hungry part, so removing it brings power and cost down together [7].

• Definition: same pluggable form factor, with only the module DSP removed, the “linear” version.

• How it works: signal restoration moves from the module to the switch ASIC’s SerDes. The module only passes through.

• Upside: power, cost, and latency drop with the DSP gone. Reuses existing pluggable infrastructure.

• Tradeoff: performance can vary by host platform, so interoperability is tricky. A practical bridge before CPO.

Rung 3. NPO (Near-Packaged Optics)

The optical engine moves off the front panel to sit next to the switch ASIC on the main board. The electrical run shortens, so loss and power drop. It is a midpoint before full CPO, a compromise that captures some of the benefit at lower packaging difficulty than CPO.

• Definition: optical engine pulled off the front panel to sit beside the ASIC on the board.

• How it works: shortens the electrical path to board level, cutting loss and power.

• Upside: some of CPO’s benefit at lower packaging difficulty. Easier to use the existing supply chain.

• Tradeoff: less efficient than full CPO, and a board-level electrical path still remains.

Rung 4. CPO (Co-Packaged Optics)

The optical engine is co-packaged on the same package as the switch or GPU ASIC, right beside it. The electrical signal barely moves, so power efficiency is best. The catch: lasers are heat sensitive and hard to place beside a hot ASIC, so the laser is pulled out into a separate module outside the package. That is the External Light Source (ELS). It is the most efficient, but packaging and yield are the hardest, so volume comes latest.

• Definition: optical engine co-packaged with the ASIC, the final rung.

• How it works: minimizes the electrical path. The heat-sensitive laser is split out into an external ELS.

• Upside: best power efficiency and bandwidth density. The copper electrical wiring nearly vanishes.

• Tradeoff: highest packaging, yield, and test difficulty, so volume comes last. This is exactly the rung SemiAnalysis called late.

The Whole Ladder in One Line

We climbed all four rungs, but the point is not the ladder itself. It is the shared foundation under all four rungs. Whether rung 1 pluggable or rung 4 CPO, light is made in a laser (the source), modulated on a substrate, and carried on fiber. Silicon is not an efficient light-emitting material in the first place (I covered this in detail in the earlier light source piece), so most commercial silicon photonics links bring in a III-V light source separately, as an ELS or through hybrid integration. So whether DSP is removed (LPO) or the engine relocates (NPO, CPO), those three layers, light source, substrate, and fiber, do not drop out of any form factor.

One more thing. This ladder is also a story about where light begins. Short distances (inside one rack) still favor copper, and from longer distances (rack to rack) light takes over. Which way that boundary moves over time is what actually sets the pace of the whole ladder. I unpack this in detail later, as copper demand versus light demand.

[Figure 1: The optical architecture ladder. Four form factors from pluggable+DSP to CPO, with the copper (electrical) line and the optical (light) line color-distinguished, the copper segment shrinking and the optical engine moving toward the ASIC up the rungs]

To restate it, what SemiAnalysis called late is rung 4, CPO. And not “CPO will not happen” but “large-scale volume timing slips,” a speed claim. Rungs 1, 2, and 3 keep selling in the meantime, and all four draw on the light source and fiber beneath them. So selling the entire optical layer on the single sentence “CPO delay” is a trade that fails to separate the form factor from the shared component layer.

So Why Does This Matter for Investing

That is the picture I can lay out for free. The architecture is a ladder, CPO is the top rung, and the foundation beneath is shared.

The real question starts here. Among the names that fell together on June 9, who is CPO-dependent and who is not? Who is the plant and who is the fixture? Was Lumentum’s drop justified, or was it a power plant swept up in fixture news? Where does the EML that AAOI makes hang on the ladder? Does a pure light-source company like Sivers fall with CPO if it slips, or is it actually safer?

And the direction of capital. Was it a coincidence that NTT and SK put $500M into optical communications in the same week, or are they looking at the destination of the whole ladder?

One preview before the paywall. That AAOI fell hardest on June 9 (down 14%) and bounced hardest the next day (up 7%) is no accident. It is because of the rung AAOI stands on in the ladder. Where that rung is, and by the same logic why Lumentum is a “power plant” and why Sivers is actually safer, I work through one by one just below.

Below, I lay out the form-factor comparison quantitatively, map the four light-source companies onto the ladder, and itemize the capital that actually flowed into photonics in the second week of June. AAOI is a pluggable overshoot, Lumentum is laser capacity, Coherent is a composite materials-and-transceiver exposure, Sivers is the purest light-source option. Same selloff, but not the same bet.

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On June 9, an institutional-only note read as a “CPO rollout delay” and optical networking stocks broke in a single session. AAOI down 14%, COHR down 11%, LITE down 8%, CIEN down 7% [1][2]. But were the names the market sold really “CPO delay casualties”?

One reader asked about selling Lumentum, Soitec, and Sivers to rotate into Broadcom and Marvell. The instinct was right. The sense that you buy the fundamental layer, not the form factor, is right. The problem was that the execution pointed the opposite way.

This piece looks at three things the market missed in the CPO delay selloff: how CPO and 800VDC got bundled into one AI infrastructure delay trade, production versus volume, and the false category of a “CPO stock.” (Relevant tickers: $LITE $COHR $MRVL $AVGO, plus Soitec, Sivers, $POET.)

Contents

• Intro: a reader’s trade

• An institutional-only note, and a summary of a summary

• The real order of the selloff: price first, explanation later

• “Production has started,” but production is not volume

• Many form factors, one set of toll-gates

• Form-factor exposure matrix (LITE, COHR, Sivers, Soitec, POET)

• The “safe haven” paradox

• NVIDIA’s capital map

• Buy the dip? Scenarios, downside, monitoring

• References and sources

Intro: A Reader’s Trade, June 9

On June 9, intraday, more than ten DMs came in about this across X, Substack, and elsewhere. Here is one of the more specific ones, anonymized and close to verbatim.

“Photon Cap, SemiAnalysis just reported that CPO for NVIDIA Rubin Ultra is now delayed to 2028. I’m thinking about selling Soitec, Sivers and Lumentum tomorrow and shifting the money into AVGO and Marvell. What’s your opinion?”

The timing is perfect. Midday June 9, AAOI fell 14% and dragged the whole optical networking complex down with it [1]. COHR down 11%, LITE down 8%, CIEN down 7% [2]. The trigger was a note SemiAnalysis sent to institutional clients only, and the gist was that the CPO rollout slips later than the market expects [1].

The reader’s instinct gets one thing right. The feel of “don’t get pinned to a single form factor, buy the fundamental layer.” But the execution points the wrong way. In two places.

First, the premise got compressed. “CPO for Rubin Ultra in 2028” does not appear in any primary source, nor in any credible secondary one. What the note covered was two separate timelines. (a) NVIDIA’s large-scale adoption of native 800VDC lands around 2028, and (b) CPO shipment volume comes in below expectations in 2027 with full mass production slipping toward 2028 to 2029 [3]. The market bundled the two into a single “AI infrastructure buildout is slipping” trade and sold them together, and in the process the two timelines collapsed into one number, “Rubin Ultra CPO 2028.” 800VDC is a power architecture. CPO is an optical interconnect. Different layers, traded as one basket. Not because anyone mistook one for the other, but because they got de-risked together as one correlated theme.

Second, there is a category error. Lumentum, Soitec, and Sivers get bundled as “CPO plays,” so the logic runs: CPO is late, they die, therefore AVGO and Marvell are the safe zone. But once you see where AVGO and Marvell stand, the trade is tangled against its own premise. More on that below.

An Institutional-Only Note, and a Summary of a Summary

Sourcing first.

The June 9 note is not in any public newsletter or general paid tier. It is institutional-only [1]. One community write-up even concedes that the figures it quotes (800VDC 2028 / CPO 2027 shortfall / mass production 2028 to 2029) are based on “third-party summaries” [3].

One key word here. “Delayed” is not “dead” [3]. A timing debate and a demand denial are completely different stories. And this is not a claim that SemiAnalysis is wrong. What they made is a timing-and-magnitude call on the CPO volume ramp. What this piece makes is a mechanism call on which layer is pinned to which form factor. Different kinds of claims, and not in conflict. If anything, the Downside scenario PhotonCap wrote on June 4 sits close to their base case. More on that later.

What retail saw was not the original. It was a summary of a summary. Closing that gap is where this piece begins.

The Real Order of the Selloff: Price First, Explanation Later

One question remains. If retail cannot see the report, how did the selloff hit intraday? Reverse the order and the answer appears.

Institutions read it first. A SemiAnalysis institutional-only note reaches institutional clients, hedge funds, long-short and pod-shop desks, and tech-specialist funds before anyone else [1]. Optical was already a crowded trade, with AAOI, LITE, COHR, GLW, and MRVL bid up on the CPO and NVIDIA photonics narrative. In a seat like that, one line saying “2027 volume is too rich” is enough to trigger de-risking. Institutions read the original and trim, retail has not seen it yet, and this is not the first time a big technical claim made the market sell first and do the work later. Price moves first, and the explanation gets attached afterward [4].

Then Seeking Alpha and Tae Kim report “why it fell,” and the public learns the event. Tae Kim, on the same day, read NVIDIA executive comments as refuting the SemiAnalysis narrative rather than confirming it [5]. Last, KuCoin, Futu, and coin-news feeds recompress the summary into something louder. “800VDC delayed,” “CPO delayed,” and “mass production 2028 to 2029” collapse into one line, and the reader’s “Rubin Ultra CPO 2028” is born right here [6].

Unfold the timeline and you can see where this “delay” narrative was assembled. The January CPO Book already noted that CPO deployment, economics, and serviceability are not simple [7], and the March “Inference Kingdom Expands” said Rubin’s in-rack scale-up stays copper-centric while CPO goes rack-to-rack and into larger world-size links [8]. The May 26 “Inside the 800VDC Revolution, Part 1” framed 800VDC as a four-phase gradual shift, with the facility-level move landing in 2028 to 2029 [9]. None of these described “Rubin internals all CPO by 2028.” The picture got synthesized when the market laid one line from the June 9 note on top of all this.

The selloff did not happen because retail read the report. It happened because institutions read it first, trimmed first, and the public learned the headline only after the price had already moved. That order is the gap PhotonCap exists to close.

“Production Has Started.” But Production Is Not Volume

The same week, the data on the other side.

NVIDIA’s own blog states Spectrum-X Ethernet Photonics is “now in full production,” with CPO-based next-generation Spectrum-X switching going into scale-out and scale-across deployments on the Vera Rubin platform. It named CoreWeave, Lambda, and Oracle Cloud Infrastructure as the first adopters, and broke the silicon-to-system pipeline into layers: TSMC (silicon photonics fab), SPIL (chip-scale packaging and test), TFC (laser die modules), and Foxconn (system assembly) [10].

At GTC Taipei, networking SVP Gilad Shainer said the CPO switch developed with TSMC had begun shipping to select partners, at up to 400 Tb/s, with production capacity expanding in 2H26 [11][12]. These remarks predate the June 9 note. They were made on the GTC Taipei floor on June 3 and 4, and were re-summoned after the selloff as NVIDIA-side counter-evidence. The point that holds is no delays, mass production and customer deliveries beginning in 2H26, and a distinction: small-scale commercial validation and large-scale deployment are different stages [13].

That is the whole thing. “Production” and “broad availability” are not the same word. Between the first switch reaching a select partner and the standard form factor going into clusters of tens of thousands of GPUs sits a packaging-capacity ramp. What SemiAnalysis pointed at was most likely the speed of that ramp. That is not “CPO dies.” That is “the volume ceiling opens slower than expected.”

Many Form Factors, One Set of Toll-Gates

The optical interconnect in an AI data center is not one shape. Four broadly compete. Pluggable transceivers (today’s workhorse), NPO (near-package optics), LPO (linear pluggable optics), and CPO (co-packaged optics). They split on how far from the switch chip the optical engine sits, and on whether a DSP is in or out.

Here is what investors miss. Whichever of the four wins, there is always a laser inside, a substrate inside, and fiber inside. The light source that makes the photons, the fiber that carries them, the substrate and materials that bind chip and optics into one package. These do not sit on top of form factor. They sit underneath it, as shared toll-gates.

[Figure 1: Four form factors, one set of toll-gates. The pluggable / NPO / LPO / CPO spectrum and the common laser, substrate, and fiber layers underneath]

So “if CPO is late, optical stocks die” is a fear that lumps distinct layers together. A CPO delay does not push every optical layer the same direction. Some layers take the hit, and some buy time as pluggable runs longer. The problem is that the market put both in the same basket and sold them together.

That is the range anyone can reconstruct from public material. The real question is separate.

What if the names being sold are not pinned to CPO, and the names being bought are the actual CPO principals? Isn’t this trade pointed the wrong way?

Who holds which toll-gate, why AVGO and Marvell are not a clean hedge, and why NVIDIA’s own capital is the strongest counter-evidence of all. That part is for paying subscribers.

[Paid section: a breakdown of which layers the market mispriced, and which names a CPO delay buys time for. LITE, COHR, Sivers, Soitec, POET, AVGO, and MRVL on one table, “why it was sold” against “actual exposure.”]

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On June 5, 2026, Jensen Huang came to Seoul. The market read the visit as an HBM4 and GPU event. Huang named Samsung, SK hynix, and Micron as HBM4 suppliers for Vera Rubin, and Hyundai’s 50,000-GPU Blackwell AI factory was back in the headlines. One thing to keep straight: that AI factory and the roughly $3B physical AI investment were already announced on October 31, 2025 at the APEC summit in Gyeongju, so the June 5 visit reads less like a new deal and more like a re-staging of those plans on the ground. The fresher signal was not GPUs. It was physical AI. NVIDIA opened hiring for a Seoul-based AI Technology Center, with roles in foundation models and physical AI, and Huang said robotics is going to be the next major sector. This piece does not re-score the entire humanoid supply chain. The earlier humanoid investment map did that. The question here is narrow: which layer of Korea’s physical AI cluster did the June 5 visit move forward?

Contents

1. Intro: the headline was HBM4, but the itinerary pointed at robots

2. Physical AI does not run on the model alone

3. Why Korea: physical AI needs a factory feedback loop

4. The layers the June 5 itinerary actually pointed at

5. What changes: speed of verification, not the announcement

6. Scenarios and monitoring

7. Closing

8. References and Sources

1. Intro: the headline was HBM4, but the itinerary pointed at robots

The market read Huang’s visit as an HBM4 and GPU deal. That is not wrong. Korea is still the core of NVIDIA’s memory supply chain, and Huang named Samsung, SK hynix, and Micron as HBM4 suppliers for Vera Rubin [4]. But read the visit only that way and you miss half of it.

The trip was consumed less like a corporate visit and more like a national event. The motorcade was chased by press, and investors mapped each stop to a related stock into what some called an AI wealth map. The first dinner was a chimaek gathering with SK’s Chey Tae-won, LG’s Koo Kwang-mo, and Naver’s Lee Hae-jin, and on day three Huang threw a KBO ceremonial first pitch in a number 93 jersey, a nod to NVIDIA’s 1993 founding [10]. A peer analysis at likened it to a K-pop superstar tour and argued Korea is less a single-component supplier than a national platform for AI industrialization. The point for an investor is not the spectacle. It is what NVIDIA planted in Korea in between.

SEMIVISION @_@

Jensen Huang Becomes Korea’s New Tech Superstar

Jensen Huang Becomes Korea’s New Tech Superstar…

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a month ago · 12 likes · SEMIVISION

GPUs and HBM are what NVIDIA buys from Korea. The Seoul AI Technology Center, physical AI, and robotics are what NVIDIA plants in Korea. The investment meaning of this event sits in the second half.

[Figure 1: What NVIDIA buys from Korea (memory, GPUs) vs what it plants there (robotics, R&D, software stack)]

One point needs to be precise. The Hyundai 50,000-GPU Blackwell AI factory, the roughly $3B physical AI investment, and the AI Technology Center and AI Application Center plans that came back into the headlines were not new on June 5. They were announced on October 31, 2025 at the APEC summit in Gyeongju [1][2][3]. The June 5 visit is best read as putting those plans back in front of the camera and pushing them forward. What was genuinely new this time was NVIDIA opening a Seoul AI Technology Center and starting to hire for it, at the PhD level, for foundation model and physical AI roles [5].

So the question is not how many more GPUs NVIDIA will sell in Korea. The question is narrower. Which layer of Korea’s physical AI stack did Huang’s itinerary move forward?

Takeaway: GPUs and HBM are what NVIDIA buys. The R&D center and robotics are what it plants. The investment signal is on the side it plants.

2. Physical AI does not run on the model alone

Physical AI takes a model trained on synthetic data in simulation and pushes it out to real machines. What NVIDIA holds is the training and inference, and the software control point: Jetson Thor for edge inference, GR00T VLA as the humanoid foundation model, and Cosmos as the world model that generates synthetic data. But a model alone does not move a robot. The bottleneck of the robot body comes down to actuators, precision reducers, and sensors, and there are separate companies that build those.

A humanoid has 25 to 30 major joints, more than 30 once you add hands and linear axes. Each joint needs a motor, a precision reducer, and a sensor. That is content a GPU box does not carry. Korea sits in both the component layer and the robot body layer. The full 20-company map across the cascade is in the earlier humanoid investment map, and this piece does not redraw it.

Takeaway: physical AI needs the brain (the model) and the body (robots and parts) together. A humanoid has many joints, and the more joints it has, the larger the reducer and actuator content. Korea sits on the body side.

3. Why Korea: physical AI needs a factory feedback loop

Step back for the bigger picture. Why is NVIDIA planting physical AI in Korea at all?

AI software itself is strongest in the US. But physical AI is not finished in software. It needs real machines and factory data. The shape is a loop. Build digital twins and synthetic data in Omniverse and Cosmos (simulation), train the model in an AI factory (training), push it to the floor on robots (deployment), and feed the data from that floor back into training (factory feedback). Physical AI works once that loop closes.

Korea is a good place to close that loop inside one cluster. Autos, memory, batteries, displays, factory automation, robot parts, and robot bodies all sit in one place. What NVIDIA wants is not a GPU buyer but this deployment loop. The picture is running Hyundai’s smart factory as an Omniverse digital twin, generating synthetic data with Cosmos, and applying the result back to real factory automation and robots.

[Figure 2: Korea’s physical AI factory feedback loop. Simulation (Omniverse, Cosmos) to training (AI factory, HBM4) to robot deployment (OEM) to factory feedback, closing inside one cluster]

So this trip was not a memory procurement event. It was physical AI cluster positioning. Back to the title: NVIDIA did not come to sell GPUs. It came to position Korea as the manufacturing, robotics, and training-data cluster for physical AI. The next question is which card inside that loop had its verification timeline pulled forward by the visit, and by how much. That is where the analysis starts.

Takeaway: physical AI runs once simulation, training, deployment, and factory feedback close into one loop. Korea holds the parts of that loop in a single cluster, and what NVIDIA wanted was the loop, not a GPU buyer.

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SpaceX, the largest IPO in history (ticker SPCX, targeting a June 12 Nasdaq debut at a $1.75T valuation), posted a loss in its most recent fiscal year. The analysis uses the S-1 as the primary source and starts from one observation: SpaceX’s extreme vertical integration makes the pool of “supplier beneficiaries” thinner than people assume. From there it splits the upside into four layers ranked by certainty. Two conclusions. The profit and the proof sit in Layer 1 (LEO connectivity, Connectivity revenue $11.4B, 61% of the company), and the AI revenue that anchors part of the $1.75T valuation comes from idle compute that rivals Anthropic ($1.25B/month) and Google ($920M/month) rent, with the Anthropic contract cancellable on 90 days’ notice and the Google contract carrying GPU delivery conditions plus a 90-day termination right after year-end 2026. So the liquid exposure is not direct supply to SpaceX. It sits in dual-use light source and DSP names ($COHR, $LITE, $MRVL), the OISL bottleneck ($RKLB, $CACI), and the AI infrastructure bottleneck (power, CPO, cooling, $NVDA).

Intro: The $1.75 Trillion Paradox

The largest IPO in history belongs to a company that lost money in its most recent fiscal year. And the “AI revenue” sitting in the middle of that loss is money paid by rivals Anthropic and Google to rent idle compute, on contracts that can be ended on short notice. If you chase “SpaceX beneficiaries” without understanding the structure behind that $1.75 trillion number, you can walk straight into a trap by buying what SpaceX actually builds in-house. The bottleneck is outside the rocket. It separates real exposure from false supplier narratives, layer by layer, working from the S-1.

After 24 years private, SpaceX filed its S-1 on May 20, 2026, and S-1/A amendments on June 1 and June 3 (File No. 333-296070) [1]. The ticker is SPCX, listing on both Nasdaq and Nasdaq Texas. The IPO schedule and terms are per Reuters and CNBC reporting: roadshow June 4, pricing June 11, debut June 12, target price $135 per share, about 555.6 million shares, a $75B raise, and a $1.75T valuation [2]. One caveat: $135 is a target until the effective prospectus and pricing notice land, not a final price. The price box on the S-1 cover was filed blank, and going straight to a single fixed price with no range is unconventional [1][2].

The paradox lives in the numbers. FY2025 consolidated revenue was $18,674M, with an operating loss of $(2,589)M and a net loss of $(4,937)M [1]. 2024 was a profit year at $791M net income, but financials that retroactively fold in the xAI merger (effective February 2, 2026) flip 2025 into a loss [1]. So the largest IPO in history belongs to a company that lost money in its prior fiscal year.

[Figure 1: FY2025 segment revenue and operating income ($M). Starlink is 61.0% of revenue and the only profitable segment, but the AI operating loss drags the consolidated result into the red.]

The premise of this piece is simple. A retail investor cannot easily buy SpaceX equity itself at a reasonable price. Elon Musk controls the vote as a controlled company, and the valuation sits near the top tier of US-listed megacaps (though below the very largest names like Microsoft) [2]. So the question is not “should I buy SpaceX,” but which of the layers SpaceX validated and lifted is tradable as a listed name.

Glossary (for this whole piece)

The recurring acronyms used throughout:

• SDA (Space Development Agency): a US Space Force agency. It orders a low-orbit military mesh network (PWSA) by Tranche and adopted optical links (OISL) as the inter-satellite comms standard. The anchor buyer of OISL demand.

• ISL / OISL: ISL (Inter-Satellite Link) is the link between satellites. OISL (Optical ISL) is the laser variant, with high bandwidth, low interference, and low probability of intercept versus RF, using a 1550nm InP light source.

• OCT (Optical Communication Terminal): the terminal hardware that implements OISL. Only a few firms have been adopted by, or have a supply history with, SDA PWSA.

• rad-hard (radiation hardened): semiconductors that survive space radiation (SEU bit flips, TID cumulative dose). They form a separate market.

• NTN / D2D (direct-to-cell): NTN (Non-Terrestrial Network) is satellite-based 3GPP communication. D2D connects existing smartphones directly to satellites.

• InP / SiPh / CPO / LPO: InP (indium phosphide) is the III-V semiconductor for 1550nm lasers. SiPh (silicon photonics) integrates optical devices onto a silicon chip. CPO co-packages the optical engine next to the switch, and LPO is a linear-drive optical module that drops the DSP.

• EDFA / dWDM: EDFA is a 1550nm C-band optical amplifier, and dWDM multiplexes many wavelengths into the same band to grow capacity.

• FD-SOI (Fully Depleted SOI): a process favorable for radiation tolerance. ST’s STM32V8 was announced as 18nm FD-SOI and is cited as a candidate commercial chip (COTS) for space.

• MFU (model FLOPs utilization): the effective utilization rate of compute resources in an AI cluster.

• IRIS²: Europe’s sovereign multi-orbit (LEO/MEO) satellite network program.

The Core Claim: Why Most “SpaceX Supplier Beneficiaries” Are Closer to Traps

The word running through the entire S-1 is extreme vertical integration. SpaceX designs and builds its own Merlin and Raptor engines, satellites, user terminals, inter-satellite lasers, even custom silicon for Starlink [1]. It has gone further and started to sell its own space lasers to outside parties, supplying mini laser terminals to Muon Space and integrating into Vast’s Haven-1 [3]. The surge in silicon photonics, dWDM, and EIC roles in its job postings reads as a signal that SpaceX is building optical comms in-house, something we analyzed earlier (SpaceX-xAI: the silicon photonics underneath the valuation). In optical comms, then, SpaceX is closer to a competitor and a supplier than a customer of outside OCT vendors.

That is the first filter for beneficiary analysis. A company that builds its own rockets, satellites, lasers, and terminals has a much thinner pool of outside suppliers worth calling “beneficiaries” than people assume.

But the S-1 also names the points where the vertical integration stops. The real exposure is right there.

• GPU: “We do not have long-term or material contracts with our direct chip suppliers and procure all GPUs on a purchase-order basis. Our direct chip suppliers depend on a small number of advanced fabs” [1].

• Power: “We depend significantly on natural gas and gas turbine technology to operate our data centers” [1].

• Optical interconnect, cooling, power equipment: gigawatt-scale clusters built with outside equipment.

To summarize: SpaceX builds its own rockets, satellites, lasers, terminals, and orbital operations, but it buys GPUs, power generation, advanced fab capacity, and data center infrastructure. So the liquid beneficiaries cluster in two places.

1. The LEO / optical comms theme: SpaceX validated the technology and grew the market, but the flow is not SpaceX revenue. It is the rival LEO camp and SDA’s proliferated architecture that ride it.

2. The AI infrastructure bottleneck: power, heat, optical interconnect, GPU. SpaceX and xAI are just one buyer in this huge AI capex wave, and the upside overlaps with the general AI infrastructure trade.

The center of gravity is worth stating up front. On certainty and profitability, the part with verified fundamentals concentrates in Layer 1 (LEO), and Layer 4 (orbital AI) has almost no verifiable financial basis at this stage. This piece weights its analysis in that order. Below, each layer is cut in order of certainty.

Layer 1: LEO Connectivity (Now, Profitable)

Starlink is SpaceX’s only GAAP-profitable engine. FY2025 Connectivity segment revenue was $11,387M (+49.8% YoY), with operating income of $4,423M (+120.4%) and Segment Adjusted EBITDA of $7,168M (+86.2%) [1]. That is exactly 61.0% of company revenue. Subscribers more than doubled on a quarterly basis, from 5.0M in Q1 2025 to 10.3M in Q1 2026, with roughly 9,600 satellites across 164 countries, about 75% of all maneuverable satellites worldwide [1].

ARPU has a trap, so the notation has to be split. Annual ARPU fell 18.2%, from $99 in 2023 to $91 in 2024 to $81 in 2025, while quarterly ARPU dropped 23.3%, from $86 in Q1 2025 to $66 in Q1 2026 [1]. That is the result of trading subscriber volume for ARPU. There is reporting of a May 2026 price increase aimed at defending unit pricing [2]. The quality of the profit is good, but the pricing pressure is a real risk.

You cannot mix annual $81 and quarterly $66 in the same sentence. Anyone who follows the source will catch it.

[Figure 2: Starlink subscribers and ARPU trend. Subscribers grew from 2.3M at the end of 2023 to 10.3M in Q1 2026, while annual ARPU fell from $99 to $81 over the same span.]

Layer 1 beneficiaries: why they belong under “theme”

Because of the vertical integration filter, the names below are classified as LEO / optical comms theme exposure, not “direct supply to SpaceX.” SpaceX validated OISL and grew the market but builds it in-house, so the upside flows toward SDA, the rival LEO camp (Amazon Leo and others), and IRIS².

• Optical comms / OISL value chain: the OISL terminal bottleneck concentrates in a small set of OCT vendors that have actually been adopted by, or have a supply history with, SDA PWSA. In April 2026, Rocket Lab ($RKLB) acquired Mynaric for $155.3M, thinning the independent OCT pool, and what remains centers on Tesat-Spacecom (an Airbus subsidiary), Skyloom (private), and CACI ($CACI) [4]. The structure rides SDA and rival-camp demand, not SpaceX supply. We cover the 26 names organized by GVM Score and a 4-tier cascade in the 26-name LEO satellite cycle investment map.

• Light source / DSP (dual-use): Coherent ($COHR), Lumentum ($LITE), and Marvell ($MRVL) sit across the same 1550nm / InP / high-speed DSP technical axis, giving them thematic exposure to both ground AI optics and space OISL. They are the intersection exposed to Layer 1 and Layer 3 at once, which makes them the key crossover of this cycle. For the detailed value chain, see the SpaceX-xAI silicon photonics value chain.

• Semiconductor / control (Samsung, STM, and others): per ST’s official release, the STM32V8 is an 18nm FD-SOI MCU selected by SpaceX and used in the Starlink mini laser system [5]. ST describes the product as based on its Crolles 300mm fab and a Samsung Foundry partnership [5]. That said, the fab allocation for individual Starlink volumes is not separately confirmed, so any Samsung-side benefit is treated only as a supply-chain theme.

The key conclusion here is one line. A SpaceX beneficiary is not “a company that supplies SpaceX.” It is a company standing at a bottleneck SpaceX cannot build itself. That bottleneck is power, GPU, optical interconnect, and the OISL of LEO camps other than SpaceX.

That is the end of the free section. The paid section covers these. The real structure of the Anthropic ($1.25B/month) and Google ($920M/month) compute contracts that hold up the AI revenue, and why this revenue is structurally less durable than the headline number suggests [1][6]. The layer-by-layer sorting and the dual-use names that span two layers. The date-stamped catalyst calendar. And the boundary between the names this analysis treats as “theme exposure” and the ones it classifies as “blocked by vertical integration.” It is an angle a public earnings-call recap does not give you.

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On May 31, 2026 (US press release date, Taiwan GTC Taipei keynote), NVIDIA called Spectrum-X Ethernet Photonics “now in production.” It is the world’s first co-packaged optics (CPO) Ethernet switch built on 200G SerDes, with CoreWeave, Lambda, and Oracle Cloud Infrastructure among the first adopters. One caveat up front: “now in production” marks the start of a manufacturing ramp, while broad availability is guided to the second half of 2026, so the two should be read separately. CPO pulls optical I/O right next to the switch silicon, so the market’s first reaction was pluggable transceiver cannibalization. Yet on the 11-partner supply chain list NVIDIA disclosed back in 2025, the very companies that build pluggables (Coherent, Lumentum) show up again as CPO suppliers. This piece looks at who actually builds what behind that one-line “production” claim, and how cannibalization and upside can happen inside the same company at once.

Contents

1. Intro: NVIDIA Put Money Into the Companies It Was Supposed to Kill

2. Where CPO Actually Landed: Scale-Out, Not Scale-Up

3. The Three Physics Problems That Blocked Production

4. The Question to Ask After “Production”

5. Splitting the 11 Suppliers by Role

6. Cannibalization vs Content, Inside One Company

7. Fiber: The Second Set of Numbers CPO Creates

8. Where the Real Chokepoint Is

9. Scenarios, Monitoring Points, Close

10. References & Sources

1. Intro: NVIDIA Put Money Into the Companies It Was Supposed to Kill

The market read CPO as the death of the pluggable transceiver. NVIDIA, instead, put money into the suppliers that were supposedly dying. In 2026 it invested $2B each into Coherent and Lumentum on March 2 [9], $2B into Marvell at the end of March [10], and tied Corning in directly in May [6]. The stranger part: on the Spectrum-X Ethernet Photonics supply chain list NVIDIA disclosed back in 2025, Coherent and Lumentum are already there. The supposed casualties are also suppliers to the new platform.

That contradiction is where this piece starts. CPO removes the pluggable form factor, not the optical content. It unbundles the economics that used to sit inside one transceiver module into three layers: the laser that makes the light, the fiber and connectors that move it, and the packaging that bonds the electronic and photonic chips. So the question for an investor is not “how much pluggable does CPO kill,” but where the dollars from the shrinking transceiver socket get captured again. I broke down which layer each of the four investments targeted in a prior piece, “Coherent, Lumentum, Marvell, and Now Corning”.

Now the event itself. On May 31, 2026 (US press release date), at the Taiwan GTC Taipei keynote, NVIDIA said the Vera Rubin platform had entered full production, and inside that was one line. Spectrum-X Ethernet Photonics is “now in production,” into its manufacturing ramp, with CoreWeave, Lambda, and Oracle Cloud Infrastructure among the first adopters [1][2]. The Ethernet version that was “expected in 2026” at GTC in March 2025 [3] has flipped to “in production.”

Takeaway: what changed is one word (”expected” to “in production”), but while the market asks “who dies,” NVIDIA had already lined up “who gets paid again in a different layer.”

2. Where CPO Actually Landed: Scale-Out, Not Scale-Up

Read CPO as nothing more than “swap all copper for optics” and the market’s read-through goes wrong. The first thing to pin down is exactly which links this product replaced.

Connections inside an AI rack come in two kinds: scale-up, which binds GPUs together inside a rack, and scale-out plus scale-across, which link rack to rack and site to site. In the Vera Rubin NVL72, scale-up runs on the sixth-generation NVLink Switch and stays copper [2], while the Spectrum-X Ethernet Photonics that just entered production handles the scale-out and scale-across Ethernet fabric alongside the ConnectX-9 SuperNIC [2]. CPO did not strip copper out of the rack interior. It went into the fabric leaving the rack first.

Why can scale-up stay copper while scale-out has to go optical? It comes down to distance and frequency. Copper loss climbs steeply as signal frequency rises. As lane rates climb toward 200G SerDes, the distance over which copper can still recover the signal shrinks. Inside a rack, GPU to GPU (scale-up) is typically within 1 to 2 meters, so copper still closes the link at these rates, and it beats optics on power, latency, and cost. But rack to rack and site to site (scale-out and scale-across) stretch from several meters to tens or hundreds of meters, and at those distances copper falls into a loss regime that equalization cannot rescue. Fiber, by contrast, is a medium whose loss is measured per kilometer, so it carries long distances at low loss. That is why scale-out is forced optical. And as lane rates rise, the distance copper can hold shrinks, pushing optics closer to the chip. CPO is where that push lands.

Why this distinction matters: “CPO kills NVLink copper” and “CPO replaces part of the scale-out Ethernet pluggable market” are claims of completely different size. What happened now is the latter. The former has not.

On the spec sheet, each port is 1.6 Tb/s, and depending on configuration the switch spans 102.4 Tb/s (128 ports of 800G) to 409.6 Tb/s (SN6800, 512 ports of 800G or 2,048 ports of 200G) [5][7]. (NVIDIA’s 2025 press release rounded these to 100/400 [3].) The efficiency figures use different baselines across announcements. The 2025 platform launch cited, versus traditional designs, 3.5x energy savings, 63x signal integrity, 4x fewer lasers, 10x resiliency, and 1.3x deployment [3], while the Spectrum-X Ethernet Photonics technical material cites, versus pluggables, 5x power per port, 5x AI uptime, and 10x resiliency [7]. Both are company figures with different baselines, and neither is independently verified.

[Figure 1: Where CPO landed. Scale-up (copper NVLink) vs scale-out/across (CPO Ethernet) diagram]

Takeaway: CPO did not “rip all copper out of the rack.” It “went into the fabric leaving the rack first.” That difference sets the boundary of cannibalization.

3. The Three Physics Problems That Blocked Production

CPO sat at “maybe” for years not because the idea was hard, but because three physics problems blocked production. That these three reached a level where they integrate within a production configuration is what “now in production” actually means. Yield, per-customer qualification, and long-term reliability are separate items to keep watching.

First, where to make the light. Silicon passes light well but cannot generate it, so the laser source sits outside the package (External Laser Source, ELS) and its light is fed into the silicon photonics engine. Put the laser right next to the chip and heat destroys it. Assembling, optically aligning, and testing this ELS is the first hard problem [4].

Second, how to couple that light in without loss. Light from the external laser has to be coupled into the silicon photonics engine while preserving polarization, and the processed signal has to exit through front-panel fiber. This is a precision problem for optical connectors and fiber assemblies [4].

Third, how to stack the electronic and photonic chips in one package. Long electrical paths cost efficiency, so the electronic IC (EIC) has to sit directly on top of the photonic IC (PIC) in 3D. That is what TSMC’s COUPE process does [4][5].

None of the three is the kind one company solves alone. The laser maker, the fiber-coupling specialist, and the 3D-stacking foundry are each different. That the layers have different owners is the starting point for the investment view.

Takeaway: CPO production = external laser (ELS) + fiber coupling + 3D packaging, with all three layers meshing together in a production configuration. Different owners per layer is where the investment view begins.

4. The Question to Ask After “Production”

Up to here is the range anyone can see by following the press release and the technical blog. What the public release tells you is that the switch exists. The investable part is next: splitting the 11 disclosed suppliers by role.

The question narrows to this. Among these 11, who gains new content and who gives up a socket? Do Coherent and Lumentum gain more from ELS lasers than they lose from pluggables, or less? Why does Corning have its own separate arithmetic? And which single spot, if it falls out, stops the line?

Production is a start signal, not a destination. Between the announcement, volume shipment, and a meaningful attach rate sit more gates of yield and qualification, and at each gate a different layer books revenue first. Below: the 11-supplier split, the net of cannibalization and upside, the chokepoint, and scenarios.

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Pricing update — effective June 3, 2026 (end soon!!)

PhotonCap started with a simple bet: that there’s demand for silicon photonics research that goes deeper than press releases and earnings recaps.

That bet has paid off.

PhotonCap has grown to well over a thousand paid subscribers and ranks #23 on the Substack Top Bestseller list. I’m grateful that this publication is now trusted not only by individual investors, but by institutional investors, hedge funds, and sell-side analysts — as well as fellow research publications including Citrini Research, FundaAI, ChipStrat, Vik’s Newsletter, and Jason’s Chip, who subscribe as paid members.

New pricing — effective June 3:

Monthly: $50/month (currently $30)

Annual: $500/year (currently $300)

Already a paid subscriber? Your rate is locked in permanently. Nothing changes for you.

If you’ve been considering subscribing, now is the time. Lock in the current rate before June 3.

Content offerings, format, and frequency may evolve over time as PhotonCap grows.

— PhotonCap

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PhotonCap started with a simple bet: that there's demand for silicon photonics research that goes deeper than press releases and earnings recaps.

That bet has paid off.

What PhotonCap does differently:

This publication doesn't rely on a single source. Academic conference papers, company PRs, earnings calls, and industry news are cross-referenced and analyzed together. That's how you catch what others miss: when a PR tells one story but the paper tells another.

Here's what that looks like in practice:

Primary source analysis — academic conference papers and journal publications dissected through an investor's lens. Not academic summaries — what each breakthrough means for the supply chain and who captures the value.

Investment maps — supply-chain-level deep dives mapping who actually makes what, from laser sources to optical packaging. The kind of analysis you won't find in sell-side reports.

Portfolio and earnings — portfolio holdings shared on a quarterly or semi-annual basis, alongside earnings analysis that decodes what the numbers actually mean at the product level.

PC101 lecture series — free foundational lectures on silicon photonics, from waveguide physics to PIC design, in English and Korean.

From device physics to public markets — PhotonCap connects the layers that most research treats separately.

Where we stand — and where we're going:

PhotonCap has grown to well over a thousand paid subscribers and ranks #22 on the Substack Top Bestseller list. I'm grateful that this publication is now trusted not only by individual investors, but by institutional investors, hedge funds, and sell-side analysts — as well as fellow research publications including Citrini Research, FundaAI, ChipStrat, Vik's Newsletter, and Jason's Chip, who subscribe as paid members.

Going forward, PhotonCap will expand beyond photonics and optics to cover a broader range of companies — all through the same engineering-first lens. The approach stays the same: primary sources, physics-grounded analysis, and supply chain mapping. The scope gets wider.

New pricing — effective June 3 (11:59 PM, Pacific Time):

Monthly: $50/month (currently $30)

Annual: $500/year (currently $300)

Already a paid subscriber? Your rate is locked in permanently. Nothing changes for you.

If you've been considering subscribing, now is the time. Lock in the current rate before June 3.

Content offerings, format, and frequency may evolve over time as PhotonCap grows.

— PhotonCap

The optical interconnect value chain usually gets drawn as a single line. One optical axis running up from the InP substrate through the laser to the optical engine. That picture cannot explain why CPO is arriving now, when it goes to volume, or who captures the margin. CPO is a co-design problem where three physical budgets are bound together at once: energy (pJ/bit), heat (junction temperature), and reach (propagation loss plus coupling loss). The cost of moving one bit depends on where you draw the measurement boundary (module, port, link, engine), but retimed pluggable optics sit roughly in the 10 pJ/bit range while CPO-class designs target around 5 pJ/bit or below [1][2][3]. Over the same window, rack power climbs from about 40kW in the H100 generation to roughly 600kW for Rubin Ultra Kyber, and 800V HVDC is designed with 1MW-class racks in mind [4]. The switch ASIC junction sits near 100C inside the same package as the optics [5]. The conclusion up front: CPO ramp timing is set not by InP supply but by the moment 800V power, liquid cooling, ELS reliability, and optical engine qualification all open together. This piece redraws the value chain at the point where those three budgets collide. Relevant tickers are in the subtitle above.

Contents

• Intro: the market already voted with one leg

• Three budgets: energy, heat, reach

• Everyone sees the InP bottleneck. But

  1. Splitting one rack into dollars and watts

  2. The energy axis: where copper dies and DSP disappears

  3. The thermal axis: the gate that sets CPO’s schedule

  4. The reach (optical) axis: the supply chain everyone draws, resorted

  5. Value migration: copper earns the most right before it dies

  6. Scenarios, monitoring, closing

• References & Sources

Intro: the market already voted with one leg

At GTC in March 2026, Jensen Huang put three big threads on stage. Rubin, Feynman, and CPO. The first two are GPU generation names. The third is not a GPU but the way GPUs get connected. On the same stage NVIDIA stated that the CPO switch had moved into a “volume production plan” phase, and the company laid out an AI systems demand outlook of about one trillion dollars through 2027 [6]. That trillion is not a CPO order book. It is total AI systems demand across the Blackwell and Rubin platforms, and CPO has moved up into that roadmap as a core networking layer.

This system-level reshaping, where workloads split from training into inference and agentic, and GPU, host CPU, and inference accelerator get divided across several foundries into a multi-anchor structure, was the subject of an earlier piece, “The GPU era ran on TSMC, the inference era runs on multiple foundries”. Its conclusion was that as chips split apart, the next bottleneck moves from “who makes the chips” to “what fabric connects these chips.” This piece looks at exactly that fabric, optical interconnect.

The signal is already in the tape. In NVIDIA’s results, the networking contribution started growing ahead of compute, and the optical, power, and cooling names were repriced one after another over the past year. Up to here it is tempting to label the whole thing the “optical cycle.” The moment you do, you see only half of it.

Turn the lens from optics to electricity and the underlying problem shows up. Why convert copper to light now? Because the energy it takes to move one bit over copper has crossed the point where it costs more than the computation that bit represents. That is the real starting point of this cycle, and it is not a story about optical companies alone.

The market voted with one leg on “optics is good.” The other leg is electricity and heat.

Three budgets: energy, heat, reach

For an investor, the frame that explains CPO better than a supply chain is a budget. An engineer designing an AI rack has to satisfy three budgets at once. Break any one of them and the system does not stand, no matter how good the rest is. The limits of copper that the industry flagged through 2026 sort into the same three branches: power delivery, electrical bandwidth, and distance [7].

First, the energy budget. The farther you push a signal over SerDes, the heavier the equalization and retiming burden, and power rises quickly with distance and speed. The economic, power-efficient reach of passive copper shrinks fast each generation. In a traditional pluggable, the electrical path loss between the host ASIC and the module runs to about 22dB, and at 200G/lane retiming becomes mandatory [8]. CPO cuts that path from inches to millimeters, lowering loss and power together, because light covers the same distance for almost free. The numbers make the gap clear. The values shift with the measurement boundary, but retimed pluggable optics sit roughly in the 10 pJ/bit range, while CPO-class designs that bring the optics inside the package target around 5 pJ/bit or below [1][2][3]. NVIDIA put the per-port CPO power saving at about 3.5x at its 2025 Spectrum-X Photonics announcement [9]. NVLink scale-up bandwidth runs at 1.8 TB/s per GPU on Blackwell (NVLink 5) and 3.6 TB/s on Rubin (NVLink 6), doubling each generation [10], and pushing that bandwidth over copper blows the power budget first.

Second, the thermal budget. The “co” in co-packaged is the heart of the problem. The moment you place optics next to a hot ASIC, you get a thermal conflict. Lasers are extremely temperature-sensitive. When temperature drifts, the lasing wavelength shifts, threshold current rises, and lifetime falls steeply [11]. Yet the switch ASIC dumps hundreds of watts. On the limits Intel laid out, the switch chip junction needs to stay below 105C and the optical module EIC junction below 100C, and in a 51.2 Tb/s CPO system the switch junction lands near 97C [5]. To avoid that conflict, the laser gets pulled out of the package and placed far away, which is the external laser source (ELS) architecture [11]. ELS is not optical-design elegance. It is a compromise forced by heat.

Third, the reach budget. Light travels far, but not for free. To be precise, there are two kinds of loss. Propagation loss, which accumulates with distance along fiber and waveguide, and coupling loss, which is added at each interface where light crosses a medium, such as laser to fiber or fiber to PIC. Why this fiber-to-chip coupling is the last bottleneck of CPO packaging was the subject of an earlier piece, “The Last Millimeter: Fiber-to-Chip Coupling and the CPO Packaging Bottleneck”. Pull the laser far out and the combined link budget grows, and to cover it the launch power has to be high. That is why a CPO laser demands far higher output than a regular transceiver CW laser. This is where the optical axis running InP, laser, SOI, foundry shows up. The supply chain everyone draws.

[Figure 1: The Three Budgets of Co-Packaged Optics, energy / thermal / reach as three coupled constraints]

The key point is that the three budgets are not independent. They are coupled. Pull the laser far out to solve heat and the reach budget worsens. Bring it close to shorten reach and the thermal budget breaks. Add optics to cut power and thermal density climbs again. CPO design comes down to satisfying these three constraints at the same time.

CPO is not about gathering optical components. It is about meeting three competing budgets at once.

Everyone sees the InP bottleneck. But

That InP substrate is tight is now common knowledge. Why AXT sits at the center of that bottleneck was the subject of an earlier piece, “AXT Inc. (AXTI) Deep Dive: The Hidden Bottleneck in AI Optical Interconnects”. The problem is that it does not set when CPO goes to volume. Timing is held by power and heat, not optical supply. You cannot place optics next to a 1500W ASIC until you have solved how to feed it and how to cool it.

The bottleneck is not InP alone. Almost every layer across the three budgets has its own bottleneck and its own stock story, and PhotonCap has covered them layer by layer. On the reach axis alone, the last millimeter of fiber-to-chip coupling is in “The Last Millimeter”, the FAU and microlens supplier landscape is in “The COUPE Microlens Monopoly Is Real, But the Market Is Missing the Bigger Picture”, the photonics-SOI monopoly under the PIC is in “The Wafer That Used to Roll Around My Lab”, and the light-source maker that moved from cable-TV parts to AI optics is in “$AAOI, From $10 to $150”. On the thermal axis, the EO polymer that Tower chose is in “The Polymer That Tower Chose”. On the power axis, why Vicor’s vertical power delivery starts from a single line, P=I squared R, is in “P = I squared R”. POET at the optical engine integration step is in “$1.1M Revenue, $1.1B Market Cap”, and the picture of the whole system splitting from a single foundry into multi-anchor is in “The GPU Era Ran on TSMC”. This piece puts those layer-by-layer analyses back onto one coordinate system: energy, heat, and reach.

So this piece tracks three migrations. The power budget moves from 54V to 800V, the energy budget from the DSP retimer to the host and CPO, and the reach budget from the pluggable laser to ELS, the optical engine, and the foundry. Recast as three questions: split one rack into dollars and watts and what share is optical, and where does that share move each generation? On the energy axis, which component sees money leave first? And how much more does copper earn right before it dies?

Where the answers to these three questions meet is where winners and losers split. The body works through those intersections one by one.

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Pricing update — effective June 3, 2026

PhotonCap started with a simple bet: that there’s demand for silicon photonics research that goes deeper than press releases and earnings recaps.

That bet has paid off.

PhotonCap has grown to well over a thousand paid subscribers and ranks #23 on the Substack Top Bestseller list. I’m grateful that this publication is now trusted not only by individual investors, but by institutional investors, hedge funds, and sell-side analysts — as well as fellow research publications including Citrini Research, FundaAI, ChipStrat, Vik’s Newsletter, and Jason’s Chip, who subscribe as paid members.

New pricing — effective June 3:

Monthly: $50/month (currently $30)

Annual: $500/year (currently $300)

Already a paid subscriber? Your rate is locked in permanently. Nothing changes for you.

If you’ve been considering subscribing, now is the time. Lock in the current rate before June 3.

Content offerings, format, and frequency may evolve over time as PhotonCap grows.

— PhotonCap

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The photonic approach uses light directly, but even platforms where light is not the qubit, superconducting (AWS), neutral atom (QuEra), trapped ion (IonQ), have to split into modules and wire them with light to grow the qubit count. A quantum signal differs from a classical one. Modern communication sends hundreds or thousands of photons at once, so losing 10 percent still lets you recover 1001010110 from the SNR, but quantum information rides on a single particle. Whether that one photon arrives becomes probability, and once loss crosses roughly half, the 1001010110 you sent can read out as 000... So the lowest loss optical network is not a choice but a requirement.

The same intuition shows up in the people. The AWS quantum director is Oskar Painter of Caltech, QuEra’s co-founder is Mikhail Lukin of Harvard who has published widely in photonics, and IonQ’s co-founder is Professor Jungsang Kim, who studied both trapped ions and optical systems. Regardless of qubit type, the people who built each camp came from photonics.

Qubits split into four families: superconducting, trapped ion, neutral atom, and photonic. But the moment you try to go past the limit of a single chip, a single fridge, or a single trap and wire rack to rack, all four platforms funnel toward the same exit. A telecom band photon (C-band 1550 nm or O-band), optical fiber, and a single photon detector. This piece looks past the qubit modality race at the optical interconnect layer underneath it. Over the past twelve months IonQ has bought optical interconnect companies including Lightsynq, ID Quantique, and Qubitekk, and acquired Oxford Ionics for $1.075B [1][2][3]. A trapped ion company vertically integrating an optics supply chain is the market admitting, ahead of everyone, that optical interconnect is the bottleneck regardless of modality. And as we will see, that signal is written not only into M&A but into the resumes of the scientists leading each camp. If picking the winning quantum pure-play is hard, the conclusion here is that you look first at the components and foundry layer that everything converges on through the telecom photon.

Table of Contents

1. Intro: Why IonQ Bought a Pile of Optical Interconnect Companies

2. Why It Has to Be Light: Superconducting, Trapped Ion, Neutral Atom, Photonic

3. Here Is the Real Question

4. Layer 1. Light Source: Every Species Has Its Own Wavelength

5. Layer 2. Conversion: Where the Difficulty Splits by Orders of Magnitude

6. Layer 3. Transport, Routing, and Who Actually Fabs the Chips

7. Layer 4. Detection: Catching Single Photons

8. The Convergence Is Not Only in Components, the People Converge Too

9. The Convergence Map: Four Platforms Buy the Same Parts

10. Investment Positioning: Where Listed Exposure Splits

11. Scenarios and Monitoring

12. Closing

Intro: Why IonQ Bought a Pile of Optical Interconnect Companies

Start with the facts.

Here is the list of companies IonQ (NYSE: IONQ) has acquired or taken a stake in over the past twelve months [1][2][4]. Lightsynq Technologies (a Harvard spinout team that built the first quantum repeater, with photonic interconnect and quantum memory IP), ID Quantique (a single photon detector and QKD company, majority stake), Qubitekk (entangled photon pair source), Capella Space, and Vector Atomic. On top of that, it acquired Oxford Ionics for $1.075B [3]. IonQ’s core business is trapped ion quantum computers. Yet half the acquisition list is photon, detector, and repeater companies.

And this is not IonQ’s bet alone. In May 2026 the U.S. Department of Commerce issued letters of intent for more than $2B in CHIPS Act support to nine quantum companies, centered on the quantum foundries of GlobalFoundries ($375M) and IBM ($1B) [5]. The money went not to the qubit itself but to the manufacturing and connection layer that makes and wires qubits together. From an investor’s seat, that means billions are already flowing into the manufacturing and connection layer beneath a qubit race that has no clear winner yet. It is a signal that there is a place you can bet without waiting for the modality outcome. That layer is exactly what this piece follows to the end.

Strange, isn’t it? Trapped ion works by holding ions in a vacuum chamber with lasers and running gates on them. The qubit itself is not a photon. So why buy up so many optical interconnect companies?

The point is connection after modularization. Trapped ion or superconducting, to gather enough qubits you eventually have to split into modules, and once you split into modules you have to wire them back together. The only physical medium that can do that wiring is, in practice, light.

It is not only qubit fidelity or error correction that bottlenecks. The moment scaling moves from one chip to modules, the optical interconnect that wires qubits across modules rises as the next bottleneck. And this bottleneck is not the problem of any one modality. It is common to all four platforms.

Why does this matter to an investor? Experts disagree on which qubit modality wins. But if every winner still needs the optical interconnect layer, then looking at the connection layer underneath becomes a sturdier question than betting on a modality. Rather than picking the winner of the qubit race, you look at which parts get sold no matter which qubit wins. IonQ buying optical interconnect companies that look far from its core business is exactly that logic.

IonQ’s acquisition pattern is a bet that, separate from “which qubit wins,” the optical interconnect layer on top is a must.

Why It Has to Be Light: Superconducting, Trapped Ion, Neutral Atom, Photonic

When people hear “optical interconnect,” they usually picture connecting two distant points. Long haul telecom across continents, satellite optical links (LEO), and the rack to rack optical interconnect inside a data center. All three are long distance links. But the same physics applies at a far smaller scale. Connecting module to module inside a quantum computer. Whether the distance is tens of km or tens of cm, the fact that light is the answer as a low loss medium for moving information does not change. Optical interconnect is not one application of the telecom infrastructure we know. It is the common layer that every form of computing reaches as it scales.

The ladder of scale makes it clear. Continent to continent (thousands of km) is subsea optical cable, city to city (tens to hundreds of km) is the metro optical network, inside a data center (tens to hundreds of m) is rack to rack optical interconnect, and going down to between boards and chips (a few cm) you reach today’s co-packaged optics. Even as the distance shrinks, the moment there is a lot of information to move and loss and heat to cut, light pushes copper out. Module to module connection in a quantum computer is a new rung added at the very bottom of this ladder. And in quantum there is one more reason to use light even at short distance. You have to move information at the single photon level without breaking it with noise.

Let us start from why you cannot cram qubits into one place forever. The reason differs by platform, but the conclusion is the same.

First, a quick pass over how qubits are built. There are roughly four families [6]. Superconducting controls superconducting circuits with microwaves at cryogenic temperatures, and IBM, Google, Rigetti, and AWS sit here. Trapped ion holds ions in a vacuum with lasers and uses them as qubits, with IonQ and Quantinuum as the standard bearers. Neutral atom arranges neutral atoms in a lattice with optical tweezers, and includes QuEra, Pasqal, and Infleqtion. Photonic uses particles of light themselves as qubits, with Xanadu and PsiQuantum out front. Other families such as silicon spin and topological are also studied, but this piece centers on the four above.

So let us see why each platform cannot stay in one module.

Superconducting qubits operate inside a dilution refrigerator, near 10 mK. Each qubit needs microwave control lines and coaxial cable, and pushing into the fault-tolerant regime of 10,000 to 1,000,000 qubits, the volume of that wiring, the amplifiers, and the microwave components runs far past the space and heat budget of a modern fridge [7]. Coaxial cable carries not just signal but heat. Every metal line going into the fridge is a heat ingress path. So connecting fridge to fridge is regarded as a practically unavoidable step for a large scale fault-tolerant quantum computer [8].

This is not only superconducting’s problem. In trapped ion, the more ions you add to one trap the denser the motional modes get and the harder gate control becomes, and in neutral atom arrays the field of view of the optics and the laser power limit how many atoms one module can hold. Even the photonic platform hits a wall in single chip yield as the component count grows. The method differs, the conclusion is the same. Past a certain scale, wiring several modules together becomes the realistic path rather than growing one module further. And to wire modules you need a medium to travel between them.

There is a familiar analogy. Classical computers also could not put transistors on one chip forever, so they split chips into many, chips into boards, boards into racks, and racks into data centers as they grew. The medium of that connection moved from copper to light as the distance grew. Just as connecting rack to rack inside a data center is ultimately optical communication. The quantum computer now stands at that wall of moving from chip to module, and the moment the distance grows, light is the answer just the same. In fact, in 2025 Xanadu presented a modular photonic quantum computer that ties four server racks together with optical fiber in Nature. It is a demonstration that a quantum computer can be built as fiber connected racks, like a data center. That said, the Nature paper itself is explicit that this is a sub-performant scale model, not a fault-tolerant machine [9].

Put differently, a quantum computer’s scaling roadmap becomes, past a certain point, necessarily an optical interconnect roadmap. The problem of making more qubits turns into the problem of sending the light those qubits emit far away without loss. So behind the qubit count headlines, how each company solves light source, conversion, and detection effectively sets the true speed of scaling. The place an investor should look is right behind that.

So the alternative is to swap coaxial cable for optical fiber. Optical fiber has a far smaller cross section and brings far less heat into the fridge than metal coaxial cable [7]. On top of that, its loss is dramatically lower. At the 1550 nm telecom C-band, fiber loss is about 0.18 dB/km, and at the O-band (1310 nm) about 0.32 dB/km [10]. Ultraviolet or visible light climbs to tens of dB per km in the same fiber and cannot travel more than tens of meters. To move a signal far, and cold, it has to be light, and specifically telecom band light.

Here is where the crux splits. The light (or signal) a qubit emits is not in the telecom band. Ions emit ultraviolet and visible light, and a superconducting qubit emits not light at all but microwaves. So every platform needs a step that translates its own signal into a telecom photon. This is the heart of the optical interconnect stack.

[Figure 1: Funnel diagram showing the signals from all four platforms converging on a telecom photon]

To summarize, the optical interconnect stack is four layers. The light source (laser) that makes light, the conversion that turns the qubit signal into a telecom photon, fiber transport and routing, and the detection that catches the single photon on arrival. All four platforms have to pass through these four layers.

Qubits come in four families, but the signal leaving the rack converges on a telecom band photon in the end. The difference is whether it reaches C-band 1550 nm or stops at O-band or near-telecom, and how much that conversion costs.

Here Is the Real Question

So far this is a picture you can draw from public material alone. There are four platforms, all need optical interconnect, and the light gathers around telecom. That far.

But what an investor really wants to know is what comes next. The way the four platforms convert to light is not the same. For some the conversion is nearly free, and some carry a problem hard by orders of magnitude, with conversion efficiency still stuck at tens of percent. Different conversion difficulty means a difference in which layer makes the money and who holds that layer.

On top of that, this convergence does not happen only in components. As we will see, the people leading the non-photonic platforms are themselves photonics people, and they are gathering toward optical interconnect as if by agreement. This may be a deeper signal than the market’s M&A.

Beyond that, we also pin down who actually fabs these photonic chips. The manufacturing layer is already the territory of listed companies, and a place that national money has flowed into.

Below we walk through the four layers of light source, conversion, transport, and detection in turn, laying out what materials and equipment each layer uses, which companies stand at the chokepoint, and how both components and people gather toward the same place.

Subscribe now

Pricing update — effective June 3, 2026

PhotonCap started with a simple bet: that there’s demand for silicon photonics research that goes deeper than press releases and earnings recaps.

That bet has paid off.

PhotonCap has grown to well over a thousand paid subscribers and ranks #23 on the Substack Top Bestseller list. I’m grateful that this publication is now trusted not only by individual investors, but by institutional investors, hedge funds, and sell-side analysts — as well as fellow research publications including Citrini Research, FundaAI, ChipStrat, Vik’s Newsletter, and Jason’s Chip, who subscribe as paid members.

New pricing — effective June 3:

Monthly: $50/month (currently $30)

Annual: $500/year (currently $300)

Already a paid subscriber? Your rate is locked in permanently. Nothing changes for you.

If you’ve been considering subscribing, now is the time. Lock in the current rate before June 3.

Content offerings, format, and frequency may evolve over time as PhotonCap grows.

— PhotonCap

Read more

AI data center power demand has triggered a nuclear renaissance. As of April 2026, over 75 reactors are under construction worldwide (WNA), and the U.S. DOE has set a target of adding 200GW of new nuclear capacity by 2050. This article deconstructs the nuclear supply chain into 5 tiers (Fuel, Reactor Design, Components, EPC, Operations/Services) and scores 13 globally listed companies (4 Korean, 9 international) using the PhotonCap GVM framework. With 1-year returns ranging from +322% to -50% across the same supply chain, we map where alpha remains.

Contents

1. Introduction

2. The Physics Behind the Nuclear Renaissance

3. The 5-Tier Supply Chain

4. Framework Preview

5. 13-Company Identification + GVM Score

6. 5-Group Classification + Company Analysis

7. Scenarios + Monitoring + Conclusion

8. References & Sources

1. Introduction

One-year stock returns.

+322%. +300%. +105%. +98%.

And within the same nuclear supply chain: -4%, -15%, -50%.

This is not simply a story of “nuclear stocks went up.” The market has already repriced one bottleneck in the nuclear value chain at a $100B+ valuation while leaving another below $5B. That gap is the signal.

Which stocks? This article answers that.

Of the few options capable of delivering 24/7 carbon-free firm power at scale and on multi-decade contracts, nuclear has re-emerged as a leading candidate.

Microsoft signed a 20-year PPA with Constellation Energy to restart the Three Mile Island reactor. Google signed an agreement with Kairos Power to open a pathway for up to 500MW of SMR power by 2035 [1]. Amazon is backing multiple nuclear projects. Meta signed a 20-year PPA with Constellation’s Illinois fleet. All four hyperscalers placing nuclear into their AI power procurement strategies at roughly the same time signals that the demand narrative for nuclear has shifted from utility-centric to hyperscaler-centric.

Most investors hear “nuclear stocks” and think of Constellation or Cameco. The nuclear cycle runs much deeper. From uranium mines through enrichment, reactor design, pressure vessel manufacturing, construction, operations, and maintenance, it spans 5 tiers, each with different bottlenecks, and therefore returns that diverge by orders of magnitude: +322% versus -50%.

This article’s core question is not which company operates nuclear plants, but which tier collects tolls when the nuclear renaissance actually creates bottlenecks.

PhotonCap has previously analyzed the glass substrate cycle (15 companies), LEO satellite cycle (26 companies), subsea cable cycle (8 companies), and defense sensor cycle (28 companies) using the same framework. The nuclear cycle steps outside photonics, but it directly connects to the existing series as the power layer of the AI infrastructure supercycle. We analyzed the optical transceivers inside data centers, so analyzing the power source that turns those data centers on is a natural extension.

[Figure 1: Nuclear Power Renaissance Timeline, 2022-2030]

2. The Physics Behind the Nuclear Renaissance

Why nuclear, why now

Global data center capacity is projected to roughly double to 200GW by 2030. That implies 100GW of new capacity needed. Solar and wind face intermittency. Natural gas emits carbon. Hydro is site-constrained. Geothermal remains limited in scale. Nuclear has re-emerged as one of the most realistic large-scale options for 24/7 carbon-free firm power.

Hyperscalers recognized this starting in 2024. This is not ESG messaging. It is multi-GW procurement on long-term contracts.

The construction pipeline

As of April 2026, the World Nuclear Association counts over 75 reactors under construction globally, with the dashboard showing 79 [2]. China leads, followed by India, South Korea, Turkey, and Russia. The U.S. is simultaneously pursuing fleet life extensions, reactor restarts, and new SMR construction.

The U.S. DOE set a target in 2024 to add 200GW of new nuclear capacity by 2050 [3]. Subsequently, executive-level targets have gone as high as quadrupling current capacity from roughly 100GW to 400GW. Either scenario requires capacity that conventional large reactors alone cannot deliver. That is why SMRs are essential.

SMR: what is different

Traditional large reactors produce 1,000MW+, take 10+ years to build, and cost $10B+ (Vogtle being the textbook example). SMRs target 50 to 300MW output, factory fabrication with on-site assembly in 3 to 5 years (target).

The key is passive safety. Rather than relying on active pumps, valves, and external power, passive safety systems use natural convection, gravity, and thermal mass to reduce dependence on active components and significantly extend the response window in accident scenarios. Fukushima was a failure of active cooling (power-dependent). SMR design philosophy is fundamentally different.

However: no SMR fleet has been commercially validated through repeated deployment under the U.S. NRC framework. (Individual cases exist outside this context, such as Russia’s floating nuclear plant and China’s HTR-PM, but the regulatory and deployment model differs from Western grid-scale SMR fleet deployment.)

NuScale is the most advanced SMR vendor on the NRC certification/approval track. Its 50MWe design received NRC design certification in 2023, and the 77MWe US460 received Standard Design Approval in 2025 [4]. GE Vernova’s BWRX-300 is under construction at OPG Darlington in Canada (2029 to 2030 target). And Oklo is pursuing a fundamentally different approach with a fast reactor that recycles spent nuclear fuel. In May 2026, the NRC approved Oklo’s Aurora Principal Design Criteria on an accelerated schedule [5].

[Figure 2: Large Reactor vs SMR Comparison]

Korea’s position: Team Korea

Among countries with nuclear construction track records, only three can credibly compete in Western markets: South Korea, France, and the United States. Russia and China are effectively excluded from Western markets. EDF lost the Czech Republic bid to KHNP.

South Korea is the only country to have completed a recent nuclear build (UAE Barakah, 4 APR-1400 units) on time and on budget. This track record was the decisive factor in winning the Czech Dukovany contract: $18.6B, two APR-1000 units [6]. The “Team Korea” consortium comprises KHNP (lead), KEPCO E&C (design), Doosan Enerbility (equipment/construction), KEPCO NF (fuel), and KEPCO KPS (maintenance) [6].

The EPC contract was signed on June 4, 2025 [7]. A Czech-Korean ministerial committee was established in February 2026 [8]. Construction permit target is 2027, groundbreaking 2029. Doosan Skoda Power has secured the turbine supply contract [9].

There is an important risk attached to the Team Korea export thesis, however. Following the 2025 IP settlement with Westinghouse, certain market access restrictions and/or royalty structures reportedly apply [10]. The specific terms are confidential, but Korean media and FT reporting have cited restrictions covering North America, the UK, Japan, Ukraine, and parts of the EU. Czech Dukovany proceeded as an exception within this settlement. Extrapolating EU and North American follow-on orders without a Westinghouse cooperation structure is not straightforward.

How has the market reflected this thesis? Doosan Enerbility’s 1-year return is +322.4% [11]. The market has finally started pricing “proven export capability.” Whether the Westinghouse risk is fully priced in remains uncertain.

Korean nuclear companies are fundamentally different investments from U.S. SMR companies in that they have actual construction track records. At the same time, they carry the unique risk of the Westinghouse IP structure.

[Figure 3: Global Nuclear Construction Pipeline by Country]

3. The 5-Tier Supply Chain

Deconstructing the nuclear cycle from an investment perspective yields 5 tiers.

T1 Fuel: Uranium mining, conversion, enrichment, fuel fabrication. The “raw material” of nuclear. According to the IEA, Russia accounts for roughly 40% of global enrichment capacity [12]. Western supply chain independence is the core thesis.

T2 Reactor Design: The reactor itself. From large reactors (APR, EPR) to SMRs (VOYGR, BWRX-300) and fast reactors (Aurora). NRC certification is the defining barrier to entry.

T3 Components: Pressure vessels, steam generators, instrumentation and control. ASME Nuclear-certified manufacturing facilities can be counted on one hand globally. “Qualification” is the bottleneck.

T4 EPC (Construction): Integrated engineering, procurement, and construction. Fewer than 10 EPC firms globally have nuclear construction experience. “Experience itself” is the bottleneck.

T5 Operations/Services: Plant ownership/operation + maintenance/life extension. The most stable cash flows, but the market appears to have already completed re-pricing. Constellation -4.3%, Vistra approximately -15%.

[Figure 4: Nuclear Power 5-Tier Supply Chain Value Map]

Investment character by tier:

T1 Fuel: Commodity + geopolitics. Uranium price and enrichment capacity constraints are drivers. T2 Reactor Design: Venture bet. NRC certification and first commercial operation are de-risking events. T3 Components: Picks and shovels. Regardless of which reactor design wins, components are needed. ASME certification is the moat. T4 EPC: Execution premium. Construction track record equals competitive advantage. T5 Operations/Services: Cash cow + annuity. Fleet revaluation is done. Recurring maintenance revenue is the next wave.

Actual 1-year returns make the re-rating pattern clear. T3 Components (Doosan +322%) and T1 Fuel (Cameco +105%, Centrus +98%) moved the most. T5 Operations (Constellation -4.3%) is resting. T2 Reactor Design is severely polarized: GE Vernova at +300% (as the AI power infrastructure anchor) versus NuScale at -50% (patience exhausted over zero commercial revenue).

The key: the market has repriced “nuclear renaissance” but has not repriced all 5 tiers evenly. Capital is rotating from T5 Operations toward T3 Components and T1 Fuel. If this rotation is not over, the remaining T1 bottleneck is where alpha sits.

[Figure 5: Tier-by-Tier Re-rating Status]

4. Framework Preview

Everything above is visible from public data. AI power demand revived nuclear. 13 listed companies sit across 5 tiers. Each tier’s re-rating speed differs.

What the paid section reveals is not simply a stock list, but which bottleneck remains under-reflected in price.

Scoring the 13 companies through the GVM framework yields 5 groups:

• Group A: Toll Collector. Positioned to charge every participant in the cycle.

• Group B: First Mover. Secured advantage through NRC certification or construction track record.

• Group C: Execution Machine. Order-driven + recurring revenue. Team Korea core.

• Group D: Venture Bet. Clear technical differentiation but no commercial track record yet.

• Group E: Infrastructure Play. Not nuclear-pure but benefiting from the infrastructure cycle.

One of these 5 groups contains a Hidden Card. GVM weighted score ranks #2 overall, yet market cap is roughly 1/30th of #1. It has nearly doubled in the past year, and the gap still remains.

[Figure 6: Positioning Scatter Plot, Free Section (no names, Hidden Card dashed circle)]

Which 13 stocks. How the 5 groups map. Which company is the Hidden Card. This article answers all three.

One more thing: I have personally invested in or currently hold positions in 4 of the 13 companies covered in this map. Which ones and why are disclosed in the paid section.

Pricing update — effective June 3, 2026

PhotonCap started with a simple bet: that there’s demand for silicon photonics research that goes deeper than press releases and earnings recaps.

New pricing — effective June 3:

Monthly: $50/month (currently $30)

Annual: $500/year (currently $300)

Already a paid subscriber? Your rate is locked in permanently. Nothing changes for you.

If you’ve been considering subscribing, now is the time. Lock in the current rate before June 3.

Content offerings, format, and frequency may evolve over time as PhotonCap grows.

— PhotonCap

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Over a single month in May, the same demand signal emerged from three layers of the AI optical supply chain. Laser source (Lumentum, 5/5), transceiver/CPO (Coherent, 5/6), DSP/switch/SiPh (Marvell, 5/27). All three companies raised their forward demand visibility for AI optical interconnects, and all three secured $2B strategic commitments from the same counterparty: NVIDIA. Marvell posted Q1 FY27 revenue of $2.418B (+28% YoY), raised its interconnect growth outlook from +50% to +70%, and lifted FY28 revenue guidance to $16.5B, a $1.5B increase. This article analyzes the Marvell earnings while mapping why all three earnings paint the same picture, and where each company and layer sits within that picture.

Contents

• Abstract

• Three Signals in One Month

• Marvell Q1 FY27: The Numbers

• Why Interconnect: Scale-Out, Scale-Up, Scale-Across

• Marvell Interconnect: Why +50% Became +70%

• Custom Silicon and Switching

• Cross-Validation of Three Earnings: Same Demand, Different Layers

• Supply Chain Layer Map: Beneficiary Positioning

• SiPh Foundry Layer: Who Actually Fabricates Silicon Photonics?

• Polariton and LWLG: The Boundary of Modulator Physics

• Scenario Analysis

• Monitoring Points

• PhotonCap’s View

• References & Sources

Three Signals in One Month

On May 5, Lumentum reported earnings. 200G EML revenue doubled sequentially. Narrow linewidth laser revenue grew +120% YoY for the ninth consecutive quarter. Pump laser revenue grew +80% YoY, and optical components across the board were described as sold out. CPO ultra-high-power lasers showed ramp/PO visibility for the first half of 2027. And NVIDIA invested $2B. [1]

The next day, Coherent reported. OCS TAM guidance was raised to over $4B, CPO incremental TAM to over $15B. InP 6-inch wafer production capacity was being doubled by the following quarter, with plans to more than double again by CY27. The prior quarter had already shown datacenter book-to-bill exceeding 4x, and Q3 expanded the backlog to record levels with order visibility extending to CY28. NVIDIA invested another $2B here as well, with multi-year purchase commitments and capacity access rights for advanced laser and optical networking products. [2]

Then, on May 27, Marvell reported Q1 FY27 earnings.

Revenue $2.418B. Up +28% year over year, $18M above the midpoint of guidance. Data center revenue $1.833B, representing 76% of total. Non-GAAP EPS $0.80, up +29% YoY. Operating cash flow $639M, a company record. [3]

The numbers alone are a solid beat. But what actually mattered in this report was not the results themselves.

It was the scale of the guidance raise.

Q2 revenue guidance of $2.7B. More than $100M above the $2.6B consensus. Full-year FY27 revenue outlook raised to roughly $11.5B, up more than $500M from the prior quarter. FY28 raised to $16.5B, up $1.5B from the previous outlook. [4]

And the core driver behind this raise was interconnect. FY27 interconnect growth outlook moved from +50% to +70%. In CEO Matt Murphy’s words: “We are seeing exceptional AI-related bookings.” [4]

NVIDIA invested $2B here too. Optics partnership, NVLink Fusion integration, AI RAN. [3][5]

Within a single month, the same signal emerged from three layers. The laser source company reported capacity constraints. The transceiver company reported record backlog and order visibility extending into CY28. The DSP/switch company raised its interconnect growth rate by 20 percentage points. And all three were pulled into NVIDIA’s $6B optical supply-chain blueprint.

This is not a simple demand confirmation. It is a structural signal that NVIDIA is aligning the entire optical interconnect supply chain around its own platform architecture. In the early GPU ramp, advanced node and CoWoS bottlenecks dominated the conversation. In the inference/scale-up phase, the optical interconnect supply chain is becoming part of the platform architecture itself.

If three earnings are painting the same picture, it is not coincidence. It is structure.

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Marvell Q1 FY27: The Numbers

Before diving into the analysis, here are the Q1 numbers.

Q1 FY27 revenue came in at $2,418M, up +28% from $1,895M a year ago and +9% from $2,219M the prior quarter. Data center revenue was $1,833M (YoY +27%, QoQ +11%), and Communications & Other was $585M (YoY +29%, QoQ +3%). Non-GAAP gross margin was 58.9% (prior quarter 59.0%, year-ago 59.8%), non-GAAP operating margin was 35.0% (prior quarter 35.7%, year-ago 34.2%). Non-GAAP EPS was $0.80 (YoY +29%, QoQ flat). Operating cash flow hit $639M, a company record, up +92% from $333M a year ago and +71% from $374M the prior quarter. [3]

[Figure 1: Marvell Quarterly Revenue and Data Center Mix Trend]

Data center now accounts for 76% of revenue, more than three-quarters of the total. Marvell has crossed the threshold where investors should analyze it primarily as an AI infrastructure company.

Cash flow stands out. The $639M record operating cash flow is nearly double the year-ago figure of $333M. Cash on hand sits at $3.84B, reflecting the Celestial AI + XConn acquisitions ($1.27B) and the $2B preferred stock issuance to NVIDIA. [3][4]

Non-GAAP gross margin of 58.9% dipped slightly from 59.0% the prior quarter and is 90bp below the year-ago 59.8%. This is a mix effect from growing custom silicon share. Management noted that “product mix will remain key determinants of our gross margin.” [3]

The Guidance Raise: Pay Attention to the Magnitude

The most important part of this earnings report is not the results, but the size of the forward guidance increase.

FY27 revenue outlook moved from roughly $11B to roughly $11.5B, up $500M. FY28 moved from roughly $15B to $16.5B, up $1.5B. Data center growth rates were raised from roughly 40% to roughly 50% YoY for FY27, and FY28 was newly guided at roughly 55% YoY. Interconnect growth moved from +50% to +70% for FY27, and FY28 custom went from “double” to “more than double.” [4]

In a single quarter, the FY28 revenue outlook went up by $1.5B. That is the entire annual revenue of most mid-cap semiconductor companies.

Most of this raise came from data center, and within that, from interconnect. Data center revenue grew +46% in FY26, is projected at +50% for FY27, and +55% for FY28. The growth rate is not just rising. It is accelerating. [4]

Q2 guidance of $2.7B also beat the $2.6B consensus, and Q3 is already expected to hit $3B. Murphy said he expects “at least 10% sequential growth in Q2, Q3, and Q4.” Marvell has entered a phase where quarterly revenue is stepping up 10% QoQ. [4]

FY28 non-GAAP operating margin is expected to reach the upper end of the 38% to 40% target range, while non-GAAP opex growth is projected at mid-to-high teens, well below the 45% revenue growth rate. This is the phase where operating leverage starts to show up in real numbers. [4]

Supply chain investment is aggressive. Marvell plans $1B in supply-chain prepayments during FY27, sharing its demand forecast with suppliers and backing it with cash to secure capacity. COO Christopher Koopmans noted that “we have not been in an unconstrained environment since 2020.” [4]

Acquisitions moved fast as well. Celestial AI (photonic fabric, EAM modulator) and XConn (scale-up switching) both closed in February. Polariton Technologies (plasmonic silicon photonics) was acquired in April. All three acquisitions are directly tied to interconnect. [4]

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Why Interconnect: Scale-Out, Scale-Up, Scale-Across

To understand Marvell’s guidance raise, you need to understand how AI data center network architecture is changing. We analyzed the three scaling dimensions in detail in a previous PhotonCap article, “NVIDIA’s $2B Marvell Bet and Celestial AI’s ‘25x Bandwidth’ Claim: What’s the Denominator?”, and we carry the same framework forward here.

In the early days of AI, compute and memory were the bottleneck. More GPUs, faster HBM. But as complex workloads like reasoning models, mixture-of-experts, and Agentic AI have emerged, the bottleneck has shifted to networking. [4]

Three dimensions of interconnect are expanding simultaneously.

Scale-out: Server-to-server connectivity. Traditional Ethernet-based. Transitioning from 800G to 1.6T. Marvell’s PAM4 DSPs and Coherent/Lumentum transceivers go here.

Scale-up: GPU/XPU-to-GPU/XPU connectivity within a single compute domain. Protocols like NVLink, UALink, and eSUN. This is the primary battleground for CPO (Co-Packaged Optics) and NPO (Near-Package Optics). Coherent’s CPO modules, Lumentum’s ultra-high-power lasers, and Marvell’s SiPh light engines all target this market.

Scale-across: Data center to data center connectivity. When AI clusters span multiple buildings due to power and space constraints, the backend AI network must extend across buildings too. DCI (Data Center Interconnect) modules are the key product here, and Marvell is leading with integrated coherent DSP + module solutions. [4]

[Figure 2: Scale-Out / Scale-Up / Scale-Across Architecture and Component Map]

What matters is that optical interconnect share is rising across all three dimensions. Scale-out sees higher optics ASP from the 800G/1.6T transition. Scale-up is hitting copper’s bandwidth ceiling, making optical solutions essential. Scale-across is optical by nature.

Matt Murphy put it this way: “It is increasingly clear that optics is the future of data center connectivity.” [4]

And the supply chain building this optical connectivity stack is exactly what reported through three consecutive May earnings calls. Lumentum makes the lasers. Coherent makes the transceivers. Marvell makes the DSPs and switches.

The emergence of Agentic AI is an additional demand accelerator. According to Murphy, in traditional 1-shot inference a single query hits an AI model once. In Agentic AI, a single user request triggers multiple agents querying AI models multiple times across different parts of the AI cluster. Data traffic volume, reach distance, and latency requirements all go up. Across scale-out, scale-up, and scale-across simultaneously. CPU deployment also increases, pulling NIC, PCIe switch, and retimer demand along with it. [4]

This is not simply a story about “optical demand is strong.” The direction of AI workload evolution itself is consuming optical bandwidth structurally.

The question is which layers within this supply chain capture how much of the benefit. Even within the same cycle, beta differs by layer. Even within the same layer, the beneficiary path diverges by technology choice.

What the three earnings confirmed is the existence of demand. What needs to be analyzed next is how that demand distributes across each layer of the supply chain, and who holds what position within it. When Marvell’s interconnect guidance rose from +50% to +70%, which sub-segments drove those 20 percentage points? How does Lumentum’s EML capacity constraint affect Marvell’s DSP shipments? Are Coherent’s CPO ramp and Marvell’s SiPh light engine targeting the same market or different ones? These are the questions.

One more thing. Polariton Technologies, which Marvell acquired in April, makes plasmonic-based modulators. Modulator bandwidth exceeding 1THz, 10x that of conventional SiPh. This is technology that surpasses the physical bandwidth ceiling of current silicon photonics modulators (roughly 70 to 120GHz), and there is another company trying to solve the same problem with different physics. The structure of this competition and its investment implications are analyzed in detail in the paid section.

We also cover the foundry layer that actually fabricates SiPh chips. GlobalFoundries, TSMC, Tower, X-FAB, UMC, and Samsung are competing for SiPh platform dominance, and when CPO/NPO deploys at scale, this foundry layer could become a new supply chain bottleneck. X-FAB’s Microsystems & Photonics revenue hit +42% YoY to an all-time high, and its stock recently surged. These foundries’ SiPh platform choices also affect the technology strategies of downstream customers like Marvell, Broadcom, and Celestial AI. The technical differences and competitive dynamics across foundries are mapped in the paid section.

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LightPath Technologies ($LPTH), an Orlando-based IR optics company with $50.6M in revenue over the first nine months of FY26 (Jul 2025 to Mar 2026) and ongoing net losses, is trading near a $1B market cap. FY26 Q3 standalone revenue was $19.1M (YoY +109%), with backlog at $110.6M (+196%). The investment thesis here is that supply chain regulation and material substitution are pushing in the same direction: in the U.S. defense IR optics market, where dependence on Chinese-dominated germanium must be unwound, a domestically integrated chalcogenide glass producer commands a procurement eligibility premium. This article covers a material property comparison based on SPIE paper data, the regulatory drivers from NDAA Sections 834/844, and the competitive landscape.

Table of Contents

1. Why I Started Looking at This Stock

2. The Germanium Problem: Why Now

3. The Alternative Material: Chalcogenide Glass and What the SPIE Paper Shows

4. LightPath Technologies: Company Anatomy (Products, NRL License, M&A, Lockheed Martin Program)

5. Financials: Fast Growth, Unproven Profitability

6. Competitive Landscape: Not a Monopoly

7. Bull Case, Gap, Optionality

8. Valuation: Three Futures That a $1B Market Cap Demands

9. Scenario Framework 10. Monitoring Checklist

1. Why I Started Looking at This Stock

A company with $50.6M in FY26 nine-month revenue carries a $1B market cap. It is still losing money.

One of the most dramatic stock moves in the photonics sector this year was $AAOI (Applied Optoelectronics). It ran from a 52-week low near $15 to an intraday high of $233. AAOI is not a large platform company that dominates optical materials, lasers, and modules the way Lumentum or Coherent does. What the market bought was “a rare supply chain position: U.S.-anchored vertical integration from laser chips and subassemblies in Sugar Land, Texas to high-speed optical modules, with expanding AI datacenter transceiver capacity.” The onshoring premium kicked in across the AI datacenter supply chain.

I saw a similar structure in $LPTH. The sector is different. AAOI is datacenter optical interconnect. LPTH is defense IR optics. Both are vertically integrated in the U.S., and both are receiving multiples based on supply chain positioning rather than platform dominance. That said, AAOI is already at a $600M+ total revenue run-rate with Q1 2026 datacenter revenue of $81.4M, while LPTH is still at $67M annualized with defense backlog conversion yet to be proven. The comparison has its limits in scale and visibility.

I like doing DD on small-cap tech stocks. Holding $POET and $LWLG, I have seen firsthand that photonics small caps can work when the technology fits the cycle. I have been looking for the next one, and $LPTH caught my eye while I was building a defense sensor investment map.

It is an infrared optics company. It makes lenses and camera modules that go into EOIR (Electro-Optical/Infrared) systems: night vision, thermal imaging cameras, missile seekers. My first reaction was honest: “Lenses and mirrors? Isn’t that a commodity?”

Then I thought about ASML. A TWINSCAN DUV scanner costs $100M+, and a significant portion of that price comes from the lens column built by Zeiss. Dozens of SiO₂/CaF₂ glass elements, polished and aligned to nanometer precision. A “glass-cutting company” is one of the most irreplaceable suppliers in the semiconductor industry. ASML’s UV lithography optics and LightPath’s IR thermal optics are completely different in precision, materials, customers, and ASP. But one structural parallel holds: when optical materials and lens assemblies define the performance ceiling of a system, the “glass-cutting company” is not a commodity supplier. It becomes a bottleneck supplier. Detection range, resolution, and focus stability across temperature extremes in a thermal camera all start with the physical properties of the lens material.

$LPTH caught my eye during the defense sensor mapping work precisely because there was an interesting story at the material level. And this is not limited to defense. In AI datacenters, optical interconnects are becoming the key to unlocking power and bandwidth constraints in GPU cluster scaling. In semiconductor manufacturing, ASML/Zeiss optics push the physical limits of advanced nodes. In defense, IR lens materials set the performance ceiling of EOIR systems. The sectors are different, but the common thread is clear. Optics is no longer a peripheral component. It has become a constraint on system architecture.

But the interesting question about this stock is not “Is it a good company?” Good materials, good customers, good regulatory tailwinds are already substantially reflected in the stock price. A $1B market cap on a company with $50M-range nine-month revenue is the evidence. The real question is more uncomfortable. For a company with $50M in FY26 nine-month revenue to sustain a $1B market cap, what has to go right from here?

Simply selling more BlackDiamond lenses is not enough. Backlog has to convert to revenue. Assemblies and modules have to keep climbing as a share of the mix, pushing gross margin toward 40%. Large defense options like the Lockheed Martin program have to turn into actual production revenue. This article is less about “Is LPTH a good company?” and more about “Has the market already gone too far, or is this the beginning of a re-rating into a $1B defense optics platform?”

[Figure 1: LPTH Stock Price, 52-Week Range, Key Event Markers]

2. The Germanium Problem: Why Now

The traditional workhorse material for infrared lenses is germanium (Ge). It is a single-crystal semiconductor with strong IR transmission. The problem is who makes it.

China is estimated to account for roughly 60 to 70% of global germanium refining (USGS does not publish exact shares but describes China as the “leading producer”; independent estimates from Nordic geological surveys put the figure around 68%) [1]. Including Russia, some estimates place the combined share above 80% (based on 2021 data) [2]. The U.S. has virtually no domestic germanium refining infrastructure.

In July 2023, China introduced an export license regime for gallium and germanium [3]. Price spikes and procurement uncertainty hit defense and industrial IR programs worldwide.

Then in December 2025, the FY26 NDAA was signed into law, turning this into a regulatory mandate.

Section 834: Directs the DoD to develop and implement a strategy to eliminate dependence on covered nations (China, Russia, Iran, North Korea, Belarus) for optical glass and optical systems by January 1, 2030 [4].

Section 844: Adds germanium and gallium to the covered material list. The effective date is two years after enactment (December 2025) [5].

These provisions do not impose an immediate ban. They require strategy development and phased implementation. Chinese-sourced Ge lenses are not an overnight “compliance violation.” But over the 2027 to 2030 timeframe, procurement eligibility will be affected, and contract flow-down conditions in defense programs are likely to shift [4].

One more thing to know. In November 2025, China suspended certain export bans on gallium, germanium, and antimony to the U.S. until November 2026 [21]. The investment thesis is therefore closer to “long-term procurement risk created by the license regime and NDAA” than “immediate supply cutoff.” The uncertainty itself, the fact that China can reimpose restrictions at any time, is what motivates material substitution for defense program managers.

The market at stake is significant. The global IR and thermal imaging systems market is estimated at approximately $8B in 2025, projected to reach $10.6 to $11.7B by 2030 at a CAGR of 5.9 to 6.2% [13][14]. Defense accounts for roughly 35% of this, while automotive ADAS is the fastest-growing segment (CAGR 7.7 to 7.9%) [15]. Uncooled LWIR represents 72% of total revenue, and the core optical materials for this segment are germanium and chalcogenide glass [15]. In other words, the germanium supply chain issue touches a multi-billion-dollar market.

Defense EOIR systems have a 5 to 10-year design-to-deployment cycle. With a 2030 deadline, material decisions effectively need to be made now.

Germanium is not a bad material. The problem is that production is concentrated in China and Russia, and the NDAA has legislated a phased elimination of that dependence. This is a long-term procurement risk rather than an immediate ban, but given 5 to 10-year design cycles, the direction is already set.

[Figure 2: Global Germanium Supply Chain + NDAA Regulatory Timeline]

3. The Alternative Material: Chalcogenide Glass and What the SPIE Paper Shows

So what is the alternative? During this DD I found an SPIE conference paper.

“Investigation of As₄₀Se₆₀ chalcogenide glass in precision glass molding for high-volume thermal imaging lenses” (Huddleston, Novak, Moreshead, Symmons, Foote; LightPath Technologies, SPIE Proc. Vol. 9451, 2015) [6]

This paper is the key to understanding LightPath’s technical position. It contains head-to-head data comparing the mainstream chalcogenide glass composition Ge₂₈Sb₁₂Se₆₀ (contains germanium) against As₄₀Se₆₀ (germanium-free), which is the composition LightPath is pushing.

Chalcogenide glass is an amorphous glass made from Group 16 elements such as sulfur (S), selenium (Se), and tellurium (Te). Ordinary glass (SiO₂) blocks infrared, but this material transmits IR across the 1 to 18 μm range. It covers both MWIR (3 to 5 μm) and LWIR (8 to 12 μm), the key operating bands for thermal imaging cameras.

Three key differences versus germanium.

3-1. Athermalization: dn/dT

The first number that stands out in Table 2 of the paper is dn/dT, the rate at which refractive index changes with temperature. Ge₂₈Sb₁₂Se₆₀ has a dn/dT of 70 × 10⁻⁶/°C. As₄₀Se₆₀ comes in at 32 × 10⁻⁶/°C. Less than half. For reference, single-crystal germanium has a dn/dT of approximately 396, making As₄₀Se₆₀ roughly 1/12th of that value.

What this means in practice: military thermal cameras must operate from -40°C to +60°C. Germanium lenses shift focus across that range, requiring separate mechanical compensation mechanisms. The low dn/dT of As₄₀Se₆₀ increases the design freedom for passive athermal lens systems and can reduce the need for mechanical focus correction. Whether correction hardware disappears entirely in a real system depends on the optical prescription, housing CTE, and detector package design. But the direction is clear. Design freedom in SWaP-C (Size, Weight, Power, Cost) goes up.

3-2. Precision Glass Molding (PGM): Volume Production

Germanium is a single-crystal material. It has to be shaped one piece at a time using diamond turning. Chalcogenide glass is amorphous. Heat it up and it softens, allowing it to be pressed into a mold. This process is called PGM (Precision Glass Molding).

The glass transition temperature (Tg) of As₄₀Se₆₀ is 185°C, versus 285°C for the Ge-containing composition. A 100-degree difference. Lower molding temperature means less process energy and longer mold life. Complex shapes like aspheric lenses can be molded in a single step. Compared to diamond turning, production cost is inherently lower at the process level.

3-3. Transmission Range and Refractive Index

As₄₀Se₆₀ transmits from 1 to 18 μm, broader than Ge₂₈Sb₁₂Se₆₀’s 1 to 16 μm range (which has an absorption peak near 12.5 μm). Refractive index at 10 μm is 2.7777 versus 2.6023. Higher refractive index means the same optical effect can be achieved with a thinner lens. This is favorable from a SWaP-C perspective.

Tradeoffs

As₄₀Se₆₀ is not perfect. The same table in the paper reveals weaknesses. Vickers Hardness is 142 versus 189 for Ge₂₈Sb₁₂Se₆₀. It is mechanically softer and scratches more easily. CTE is 20.9 × 10⁻⁶/°C versus 14.5 × 10⁻⁶/°C. In harsh environments, DLC (diamond-like carbon) coatings are used to supplement surface hardness.

There is also a risk that should not be overlooked. Arsenic toxicity. As₄₀Se₆₀ is, as the name suggests, composed of arsenic and selenium. Arsenic is classified as “fatal if inhaled (H330)” under UN GHS, and strict safety controls are required during manufacturing to prevent dust and fume inhalation [16]. In finished lens form, the arsenic is locked within the glass matrix and poses low risk during routine handling. But regulatory burden during manufacturing and disposal is real.

As₄₀Se₆₀ is an arsenic-based glass, so substance-specific REACH/RoHS/CLP review is required at the manufacturing, polishing, and disposal stages. ECHA’s SVHC Candidate List is substance-specific rather than a blanket ban on all arsenic compounds. Finished lenses have arsenic locked in the glass matrix, but regulatory compliance verification remains a separate risk for expansion into commercial markets such as automotive and industrial applications. The industry is also developing arsenic-free compositions using antimony (Sb), and it is likely that some of the nine additional NRL-licensed compositions held by LightPath include such alternatives.

As₄₀Se₆₀ (BD6) offers germanium-free supply chain risk avoidance, athermal design freedom, and PGM volume production cost advantages, but comes with tradeoffs in mechanical durability and arsenic-related environmental regulation.

[Figure 3: Ge₂₈Sb₁₂Se₆₀ vs As₄₀Se₆₀ Material Properties Comparison]

That is the structure of the problem.

Germanium supply is concentrated in China. The NDAA will reshape procurement eligibility over 2027 to 2030. The most mature alternative material is chalcogenide glass, and within that category, the germanium-free composition As₄₀Se₆₀ has material property advantages.

The problem is not the material. The problem is how much of this material transition translates into actual backlog, gross margin, and per-share value after dilution. The harder questions start here.

First, which company can produce this material at volume within the United States? Second, is that company a simple material supplier, or can it be re-rated as a defense IR systems company? Third, and most importantly, at a $1B market cap today, is that re-rating still ahead of us?

LPTH’s story is compelling. But a good story and a good entry price are two different things.

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